Features: • 184-pin Unbuffered 8-Byte Dual-In-Line DDR SDRAM non-parity and ECC-Modules for PC and Server main memory applications• One rank 16M x 64, 16M x 72 and two rank 32M x 64, 32M × 72 organization• JEDEC standard Double Data Rate Synchronous DRAMs (DDR SDRAM) Single + 2.5...
HYS72D16000GU-8-A: Features: • 184-pin Unbuffered 8-Byte Dual-In-Line DDR SDRAM non-parity and ECC-Modules for PC and Server main memory applications• One rank 16M x 64, 16M x 72 and two rank 32M x 64, 32M...
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Features: • 184-pin Registered 8-Byte Dual-In-Line DDR-I SDRAM Module for PC and Server main...
• 184-pin Unbuffered 8-Byte Dual-In-Line DDR SDRAM non-parity and ECC-Modules for PC and Server main memory applications
• One rank 16M x 64, 16M x 72 and two rank 32M x 64, 32M × 72 organization
• JEDEC standard Double Data Rate Synchronous DRAMs (DDR SDRAM) Single + 2.5 V (± 0.2 V) power supply
• Built with 128 Mb DDR SDRAMs organised as 16Mb x 8 in 66-Lead TSOPII package
• Programmable CAS Latency, Burst Length, and Wrap Sequence (Sequential & Interleave)
• Auto Refresh (CBR) and Self Refresh
• All inputs and outputs SSTL_2 compatible
• Serial Presence Detect with E2PROM
• JEDEC standard MO-206 form factor: 133.35 mm × 31.75 mm × 4.00 mm max.
• JEDEC standard reference layout
• Gold plated contacts
Parameter |
Symbol |
Values |
Unit |
Note/Test Condition | ||
Min. |
typ. |
Max. | ||||
Voltage on I/O pins relative to VSS |
VIN, VOUT |
0.5 |
- |
VDDQ+0.5 |
V |
- |
Voltage on inputs relative to VSS |
VIN |
-1 |
- |
+3.6 |
V |
- |
Voltage on VDD supply relative to VSS |
VDD |
-1 |
- |
+3.6 |
V |
- |
Voltage on VDDQ supply relative to VSS |
VDDQ |
-1 |
- |
+3.6 |
V |
- |
Operating temperature (ambient) |
TA |
0 |
- |
+70 |
°C |
- |
Storage temperature (plastic) |
TSTG |
-55 |
- |
+150 |
°C |
- |
Power dissipation (per SDRAM component) |
PD |
- |
1 |
- |
W |
- |
Short circuit output current |
IOUT |
- |
50 |
- |
mA |
- |
The HYS72D16000GU-8-A are industry standard 184-pin 8-byte Dual in-line Memory Modules (DIMMs) organized as 16M x 64 and 32M × 64 for non-parity and 16M x 72 and 32M x 72 for ECC main memory applications. The memory array is designed with 128Mbit Double Data Rate Synchronous DRAMs. A variety of decoupling capacitors of the HYS72D16000GU-8-A are mounted on the PC board. The DIMMs feature serial presence detect based on a serial E2PROM device using the 2-pin I2C protocol. The first 128 bytes are programmed with configuration data and the second 128 bytes are available to the customer.