HYS64T32000HM3SA

• 214-Pin PC2-5300, PC2-4200 and PC2-3200 DDR2 SDRAM memory modules for use as main memory when installed in systems such as mobile personal computers.
• 32M * 64and 64M * 64 module organization, and 32M * 16 chip organization
• Standard Double-Data-Rate-Two Synchronous DRAMs (DDR2 SDRAM) with a single + 1.8 V (± 0.1 V) power supply
• 256MB and 512MB modules built with 512Mb DDR2 SDRAMs in P-TFBGA-84 chipsize packages
• Programmable CAS Latencies (3, 4 and 5), Burst Length (8 & 4) and Burst Type
• Burst Refresh, Distributed Refresh and Self Refresh
• All inputs and outputs SSTL_1.8 compatible
• Off-Chip Driver Impedance Adjustment (OCD) and On-Die Termination (ODT)
• Serial Presence Detect with E²PROM
• MDIMM Dimensions (nominal): 30 mm high, 54.0 mm wide
• Based on standard reference layouts Raw Cards:"A" and "B"
• 2-piece type Mezzanine Socket with 0,4 mm contact centers
• RoHS Compliant Products¹⁾

1) When V_DD and V_DDQ and V_DDL are less than 500 mV; V_REF may be equal to or less than 300 mV.
2) Storage Temperature is the case surface temperature on the center/top side of the DRAM.
  Attention: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

The HYS64T32000HM3SA module family are Unbuffered Micro-DIMM modules "MDIMMs" with 30 mm height based on DDR2 technology.DIMMs are available as non-ECC modules in 32M * 64 (256 MB) and 64M * 64 (512 MB) organization and density,intended for mounting into 214-pin mezzanine connector sockets.

The memory array of the HYS64T32000HM3SA is designed with 512-Mbit Double-Data-Rate-Two (DDR2) Synchronous DRAMs. Decoupling capacitors are mounted on the PCB board. The DIMMs feature serial presence detect based on a serial E²PROM device using the 2-pin I²C protocol. The first 128 bytes are programmed with configuration data and are write protected; the second 128 bytes are available to the customer.