HYB 39S128400

Features: • Single Pulsed RAS Interface• Fully Synchronous to Positive Clock Edge• 0 to 70 °C operating temperature• Four Banks controlled by BA0 & BA1• Programmable CAS Latency: 2, 3• Programmable Wrap Sequence: Sequential or Interleave• Programmable ...

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HYB 39S128400 Picture
SeekIC No. : 004368470 Detail

HYB 39S128400: Features: • Single Pulsed RAS Interface• Fully Synchronous to Positive Clock Edge• 0 to 70 °C operating temperature• Four Banks controlled by BA0 & BA1• Programmabl...

floor Price/Ceiling Price

Part Number:
HYB 39S128400
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• Single Pulsed RAS Interface
• Fully Synchronous to Positive Clock Edge
• 0 to 70 °C operating temperature
• Four Banks controlled by BA0 & BA1
• Programmable CAS Latency: 2, 3
• Programmable Wrap Sequence: Sequential or Interleave
• Programmable Burst Length: 1, 2, 4, 8 and full page
• Multiple Burst Read with Single Write Operation
• Automatic and Controlled Precharge Command
• Data Mask for Read/Write Control (x4, x8)
• Data Mask for byte control (x16)
• Auto Refresh (CBR) and Self Refresh
• Power Down and Clock Suspend Mode
• 4096 Refresh Cycles / 64 ms
• Random Column Address every CLK (1-N Rule)
• Single 3.3 V ± 0.3 V Power Supply
• LVTTL Interface
• Plastic Packages:P-TSOPII-54 400mil x 875 mil width(x4, x8, x16)
• -7 for PC 133 2-2-2 applications
  -7.5 for PC 133 3-3-3 applications
  -8 for PC100 2-2-2 applications



Pinout

  Connection Diagram


Specifications

Operating Temperature Range............................0 to + 70 °C
Storage Temperature Range .......................... 55 to + 150 °C
Input/Output Voltage  ............................ 0.3 to VDD + 0.3 V
Power Supply Voltage VDD/VDDQ   ........................ 0.3 to + 4.6 V
Power Dissipation .......................................1 W
Data out Current (short circuit) ............................... 50 mA

Note: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage of the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.



Description

The HYB 39S128400/800/160CT are four bank Synchronous DRAM's organized as 4 banks * 8MBit x4, 4 banks * 4MBit x8 and 4 banks * 2Mbit x16 respectively. These synchronous devices achieve high speed data transfer rates by employing a chip architecture that prefetches multiple bits and then synchronizes the output data to a system clock. The chip is fabricated using the Infineon advanced 0.17 micron process technology.

The device HYB 39S128400 is designed to comply with all industry standards set for synchronous DRAM products, both electrically and mechanically. All of the control, address, data input and output circuits are synchronized with the positive edge of an externally supplied clock.

Operating the four memory banks in an interleave fashion allows random access operation to occur at a higher rate than is possible with standard DRAMs. A sequential and gapless data rate is possible depending on burst length,  CAS latency and speed grade of the device HYB 39S128400.

Auto Refresh (CBR) and Self Refresh operation are supported. These devices HYB 39S128400 operate with a single 3.3 V ± 0.3 V power supply and are available in TSOPII packages.




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