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HY5DV281622DT

Features: • 3.3V for VDD and 2.5V for VDDQ power supply• All inputs and outputs are compatible with SSTL_2 interface• JEDEC standard 400mil 66pin TSOP-II with 0.65mm pin pitch• Fully differential clock inputs (CK, /CK) operation• Double data rate interface• Sour...

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SeekIC No. : 004368317 Detail

HY5DV281622DT: Features: • 3.3V for VDD and 2.5V for VDDQ power supply• All inputs and outputs are compatible with SSTL_2 interface• JEDEC standard 400mil 66pin TSOP-II with 0.65mm pin pitch̶...

HY5DV281622DT Data Sheet

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Part Number:
HY5DV281622DT
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• 3.3V for VDD and 2.5V for VDDQ power supply
• All inputs and outputs are compatible with SSTL_2 interface
• JEDEC standard 400mil 66pin TSOP-II with 0.65mm pin pitch
• Fully differential clock inputs (CK, /CK) operation
• Double data rate interface
• Source synchronous - data transaction aligned to bidirectional data strobe (DQS)
• x16 device has 2 bytewide data strobes (LDQS, UDQS) per each x8 I/O
• Data outputs on DQS edges when read (edged DQ) Data inputs on DQS centers when write (centered DQ)
• Data(DQ) and Write masks(DM) latched on the both rising and falling edges of the data strobe
• All addresses and control inputs except Data, Data strobes and Data masks latched on the rising edges of the clock
• Write mask byte controls by LDM and UDM
• Programmable /CAS latency 3 / 4 supported
• Programmable Burst Length 2 / 4 / 8 with both sequential and interleave mode
• Internal 4 bank operations with single pulsed /RAS
• tRAS Lock-Out function supported
• Auto refresh and self refresh supported
• 4096 refresh cycles / 32ms
• Full, Half and Matched Impedance(Weak) strength driver option controlled by EMRS


Pinout

Connection Diagram


Specifications

Parameter Symbol Rating Unit
Ambient Temperature TA 0 ~ 70
Storage Temperature TSTG -55 ~ 125
Voltage on Any Pin relative to VSS VIN, VOUT -0.5 ~ 3.6 V
Voltage on VDD relative to VSS VDD -0.5 ~ 3.6 V
Voltage on VDDQ relative to VSS VDDQ -0.5 ~ 3.6 V
Output Short Circuit Current IOS 50 mA
Power Dissipation PD 1 W
Soldering Temperature ` Time TSOLDER 260`10 `sec
Note : Operation at above absolute maximum rating can adversely affect device reliability


Description

The Hynix HY5DV281622DT is a 134,217,728-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the point-to-point applications which requires high bandwidth.

The Hynix 8Mx16 DDR SDRAMs HY5DV281622DT offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 2-bit prefetched to achieve very high bandwidth. All input and output voltage levels are compatible with SSTL_2.




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