Features: • VDD/VDDQ = 2.5 ~ 2.7V• All inputs and outputs are compatible with SSTL_2 interface• Fully differential clock inputs (CK, /CK) operation• Double data rate interface• Source synchronous - data transaction aligned to bidirectional data strobe (DQS)• x16...
HY5DU56822CT-D43: Features: • VDD/VDDQ = 2.5 ~ 2.7V• All inputs and outputs are compatible with SSTL_2 interface• Fully differential clock inputs (CK, /CK) operation• Double data rate interfac...
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Features: • The Hynix HY5DS113222FM(P) guarantee until 166MHz speed at DLL_off conditionR...
Features: The Hynix HY5DS283222BF(P) guarantee until 166MHz speed at DLL_off condition1.8V VDD and...
Features: The Hynix HY5DS283222BF(P) guarantee until 166MHz speed at DLL_off condition1.8V VDD and...
The Hynix HY5DU56422, HY5DU56822CT-D43 and HY5DU561622 are a 268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth.
The Hynix 256Mb DDR SDRAMs HY5DU56822CT-D43 offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 2-bit prefetched to achieve very high bandwidth. All input and output voltage levels are compatible with SSTL_2.