Features: • VDD, VDDQ = 2.5V ± 5%• All inputs and outputs are compatible with SSTL_2 interface• JEDEC standard 20mm x 14mm 100pin LQFP with 0.65mm pin pitch• Fully differential clock inputs (CK, /CK) operation• Double data rate interface• Source synchronous - da...
HY5DU283222Q: Features: • VDD, VDDQ = 2.5V ± 5%• All inputs and outputs are compatible with SSTL_2 interface• JEDEC standard 20mm x 14mm 100pin LQFP with 0.65mm pin pitch• Fully differenti...
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Features: • The Hynix HY5DS113222FM(P) guarantee until 166MHz speed at DLL_off conditionR...
Features: The Hynix HY5DS283222BF(P) guarantee until 166MHz speed at DLL_off condition1.8V VDD and...
Features: The Hynix HY5DS283222BF(P) guarantee until 166MHz speed at DLL_off condition1.8V VDD and...
Parameter |
Symbol |
Rating |
Unit |
Ambient Temperature |
TA |
0 ~ 70 |
|
Storage Temperature |
TSTG |
-55 ~ 125 |
|
Voltage on Any Pin relative to VSS |
VIN, VOUT |
-0.5 ~ 3.6 |
V |
Voltage on VDD relative to VSS |
VDD |
-0.5 ~ 3.6 |
V |
Voltage on VDDQ relative to VSS |
VDDQ |
-0.5 ~ 3.6 |
V |
Output Short Circuit Current |
IOS |
50 |
mA |
Power Dissipation |
PD |
2 |
W |
Soldering Temperature - Time |
TSOLDER |
260 ⋅ 10 |
.sec |
The Hynix HY5DU283222Q is a 134,217,728-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the point-to-point applications which requires high bandwidth.
The Hynix 4Mx32 DDR SDRAMs HY5DU283222Q offer fully synchronous operations referenced to both rising and falling edges of the
clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 2-bit prefetched to achieve very high bandwidth. All input and output voltage levels are compatible with SSTL_2.