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HY5DS573222P

Features: • The Hynix HY5DS573222F(P) guarantee until 166MHz speed at DLL_off condition• 1.8V VDD and VDDQ wide range max power supply supports• All inputs and outputs are compatible with SSTL_2 interface• 12mm x 12mm, 144ball FBGA with 0.8mm pin pitch• Fully differen...

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SeekIC No. : 004368275 Detail

HY5DS573222P: Features: • The Hynix HY5DS573222F(P) guarantee until 166MHz speed at DLL_off condition• 1.8V VDD and VDDQ wide range max power supply supports• All inputs and outputs are compatib...

HY5DS573222P Data Sheet

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Part Number:
HY5DS573222P
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• The Hynix HY5DS573222F(P) guarantee until 166MHz speed at DLL_off condition
• 1.8V VDD and VDDQ wide range max power supply supports
• All inputs and outputs are compatible with SSTL_2 interface
• 12mm x 12mm, 144ball FBGA with 0.8mm pin pitch
• Fully differential clock inputs (CK, /CK) operation
• Double data rate interface
• Source synchronous - data transaction aligned to bidirectional data strobe (DQS0 ~ DQS3)
• Data outputs on DQS edges when read (edged DQ) Data inputs on DQS centers when write (centered DQ)
• Data(DQ) and Write masks(DM) latched on the both rising and falling edges of the data strobe
• All addresses and control inputs except Data, Data strobes and Data masks latched on the rising edges of the clock
• Write mask byte controls by DM (DM0 ~ DM3)
• Programmable /CAS Latency 5 / 4 supported
• Programmable Burst Length 2 / 4 / 8 with both sequential and interleave mode
• Internal 4 bank operations with single pulsed /RAS
• tRAS Lock-Out function supported
• Auto refresh and self refresh supported
• 4096 refresh cycles / 32ms
• Half strength and Matched Impedance driver option


Specifications

Parameter
Symbol
Rating
Unit
Ambient Temperature
TA
0 ~ 70
Storage Temperature
TSTG
-55 ~ 125
Voltage on Any Pin relative to VSS
VIN, VOUT
-0.5 ~ 3.6
V
Voltage on VDD relative to VSS
VDD
-0.5 ~ 3.6
V
Voltage on VDDQ relative to VSS
VDDQ
-0.5 ~ 3.6
V
Output Short Circuit Current
IOS
50
mA
Power Dissipation
PD
2
W
Soldering Temperature ` Time
TSOLDER
260 ` 10
` sec
Note : Operation at above absolute maximum rating can adversely affect device reliability


Description

The Hynix HY5DS573222P is a 268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the
point-to-point applications which requires high bandwidth.

The Hynix 8Mx32 DDR SDRAMs HY5DS573222P offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 2-bit prefetched to achieve very high bandwidth. All input and output voltage levels are compatible with SSTL_2.




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