HY29F002T

The HY29F002T is an 2 Megabit, 5 volt-only CMOS Flash memory organized as 262,144 (256K) bytes. The device is offered in industrystandard 32-pin TSOP and PLCC packages.

The HY29F002T can be programmed and erased in-system with a single 5-volt VCC supply. Internally generated and regulated voltages are provided for program and erase operations, so that the device does not require a high voltage power supply to perform those functions. The device can also be programmed in standard EPROM programmers. Access times as fast as 55ns over th full operating voltage range of 5.0 volts ± 10% are offered for timing compatibility with the zero wait state requirements of high speed microprocessors. A 45ns version operating over 5.0 volts ± 5% is also available. To eliminate bus contention, the HY29F002T has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls.

The device HY29F002T is compatible with the JEDEC single power-supply Flash command set standard. Commands are written to the command register using standard microprocessor write timings, from where they are routed to an internal state-machine that controls the erase and programming circuits. Device programming is performed a byte at a time by executing the four-cycle Program Command. This initiates an internal algorithm that automatically times the program pulse widths and verifies proper cell margin.

The HY29F002T's sector erase architecture allows any number of array sectors to be erased and reprogrammed without affecting the data contents of other sectors. Device erasure is initiated by executing the Erase Command. This initiates an internal algorithm that automatically preprograms the array (if it is not already programmed) before executing the erase operation. During erase cycles, the device automatically times the erase pulse widths and verifies proper cell margin.

To protect data in the device HY29F002T from accidental or unauthorized attempts to program or erase the device while it is in the system (e.g., by a virus), the device has a Sector Protect function which hardware write protects selected sectors. The sector protect and unprotect features can be enabled in a PROM programmer. Temporary Sector Unprotect, which requires a high voltage, allows in-system erasure and code changes in previously protected sectors.

Erase Suspend enables the user to put erase on hold for any period of time to read data from, or program data to, any sector that is not selected for erasure. True background erase can thus be achieved. The device HY29F002T is fully erased when shipped from the factory.

Addresses and data needed for the programming and erase operations are internally latched during write cycles, and the host system can detect completion of a program or erase operation by reading the DQ[7] (Data# Polling) and DQ[6] (toggle) status bits. Reading data from the device HY29F002T is similar to reading from SRAM or EPROM devices. Hardware data protection measures include a low VCC detector that automatically inhibits write operations during power transitions.

The host can place the device HY29F002T into the standby mode. Power consumption is greatly reduced in this mode.