Features: ` Single Power Supply Operation− Read, program, and erase operations from 1.8 to 2.2 V (2.0V ± 10%)− Ideal for battery-powered applications` Simultaneous Read/Write Operations− Host system can program or erase in one bank while simultaneously reading from any sector in ...
HY29DS323: Features: ` Single Power Supply Operation− Read, program, and erase operations from 1.8 to 2.2 V (2.0V ± 10%)− Ideal for battery-powered applications` Simultaneous Read/Write Operations&...
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The HY29DS322/HY29DS323 (HY29DS32x) is a 32 Mbit, 2.0 volt-only CMOS Flash memory organized as 4,194,304 (4M) bytes or 2,097,152 (2M) words. The device is available in 48-pin TSOP and 48-ball FBGA packages. Word-wide data (x16) appears on DQ[15:0] and byte-wide (x8) data appears on DQ[7:0].
The HY29DS323 Flash memory array is organized into 71 sectors in two banks. Bank 1 contains eight 8 KByte boot/parameter sectors and 7 or 15 larger sectors of 64 KBytes each, depending on the version of the device. Bank 2 contains the rest of the memory array, organized as 56 or 48 sectors of 64 KBytes.
The device HY29DS323 features simultaneous read/write operation, which allows the host system to invoke a program or erase operation in one bank and immediately and simultaneously read data from the other bank, except if that bank has any sectors marked for erasure, with zero latency. This releases the system from waiting for the completion of program or erase operations, thus improving overall system performance.
The HY29DS323 can be programmed and erased in-system with a single 2.0 volt ± 10% VCC supply. Internally generated and regulated voltages are provided for program and erase operations, so that the device does not require a higher voltage VPP power supply to perform those functions. The device can also be programmed in standard EPROM programmers. Access times as low as 100ns are offered for timing compatibility with the zero wait state requirements of high speed microprocessors. To eliminate bus contention, the HY29DS32x has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls.
The device HY29DS323 is compatible with the JEDEC singlepower- supply Flash command set standard. Commands are written to the command register using standard microprocessor write timings, from where they are routed to an internal state-machine that controls the erase and programming circuits.
HY29DS323 Device programming is performed a byte/word at a time by executing the four-cycle Program Command write sequence. This initiates an internal algorithm that automatically times the program pulse widths and verifies proper cell margin. Faster programming times can be achieved by placing the HY29DS32x in the Unlock Bypass mode, which requires only two write cycles to program data instead of four.
The HY29DS323's sector erase architecture allows any number of array sectors, in one or both banks, to be erased and reprogrammed without affecting the data contents of other sectors. Device erasure is initiated by executing the Erase Command sequence. This initiates an internal algorithm that automatically preprograms the sector before executing the erase operation. As during programming cycles, the device automatically times the erase pulse widths and verifies proper cell margin. Hardware Sector Group Protection optionally disables both program and erase operations in any combination of the sector groups, while Temporary Sector Group Unprotect, which requires a high voltage on one pin, allows in-system erasure and code changes in previously protected sector groups. Erase Suspend enables the user to put erase on hold in a bank for any period of time to read data from or program data to any sector in that bank that is not selected for erasure. True background erase can thus be achieved. Because the HY29DS32x features simultaneous read/write capability, there is no need to suspend to read from a sector located within a bank that does not contain sectors marked for erasure. The device is fully erased when shipped from the factory.
Addresses and data needed for the programming and erase operations are internally latched during write cycles. The HY29DS323 host system can detect completion of a program or erase operation by observing the RY/BY# pin or by reading the DQ[7] (Data# Polling) and DQ[6] (Toggle) status bits. Hardware data protection measures include a low VCC detector that automatically inhibits write operations during power transitions.
After a program or erase cycle has been completed, or after assertion of the RESET# pin (which terminates any operation in progress), the device HY29DS323 is ready to read data or to accept another com mand. Reading data out of the device is similar to reading from other Flash or EPROM devices.
The HY29DS323 Secured Sector is an extra 64 Kbyte sector capable of being permanently locked at the factory or by customers. The Secured Indicator Bit (accessed via the Electronic ID mode) is permanently set to a 1 if the part is factory locked, and permanently set to a 0 if customer lockable. This way, customer lockable parts can never be used to replace a factory locked part. Factory locked parts provide several options. The Secured Sector may store a secure, random 16-byte ESN (Electronic Serial Number), customer code programmed at the factory, or both. Customer Lockable parts may utilize the Secured Sector as bonus space, reading and writing like any other Flash sector, or may permanently lock their own code there.
The WP#/ACC pin provides access to two functions. The HY29DS323 Write Protect function provides a hardware method of protecting certain boot sectors without using a high voltage. The Accelerate function speeds up programming operations, and is intended primarily to allow faster manufacturing throughput.
Two power-saving features are e mbodied in the HY29DS323. When addresses have been stable for a specified amount of time, the device enters the automatic sleep mode. The host can also place the device into the standby mode. Power consumption is greatly reduced in both these modes.
Common Flash Memory Interface (CFI)
To make Flash memories HY29DS323 interchangeable and to encourage adoption of new Flash technologies, major Flash memory suppliers developed a flexible method of identifying Flash memory sizes and configurations in which all necessary Flash device parameters are stored directly on the device. Parameters stored include memory size, byte/word configuration, sector configuration, necessary voltages and timing information. This allows one set of software drivers to identify and use a variety of different, current and future Flash products. The standard which details the software interface necessary to access the device to identify it and to determine its characteristics is the Common Flash Memory Interface (CFI) Specification. The HY29DS323 is fully compliant with this specification.