Features: · Processed with HVCMOS® technology· 5V CMOS logic· Output voltages up to 80V· Low power level shifting · 100MHz equivalent data rate using four dynamic shift registers· Static latched data outputs· Forward and reverse shifting options (DIR pin)· Diode to VPP allows efficient power r...
HV574: Features: · Processed with HVCMOS® technology· 5V CMOS logic· Output voltages up to 80V· Low power level shifting · 100MHz equivalent data rate using four dynamic shift registers· Static latched...
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The HV574 is a low-voltage serial to high-voltage parallel converter with push-pull outputs. This device has been designed for use as a driver for printer applications. It can also be used in any application requiring multiple output high-voltage current sourcing and sinking capability such as driving plasma panels, vacuum fluorescent displays, or large matrix LCD displays.
The device HV574 has 4 parallel 20-bit dynamic shift registers, permitting data rates 4X the speed of one ( they are clocked together).
HV574 has 80 static latches and control logic to perform the polarity select and blanking of the outputs. HVOUT1 is connected to the first stage of the first shift register through the polarity and blanking logic. Data is shifted through the shift registers on the logic low to high transition of the clock. The DIR pin causes CCW shifting when connected to GND, and CW shifting when connected to VDD. A data output buffer is provided by HV574 for cascading devices. This output reflects the current status of the last bit of the shift register (HVOUT80). Operation of the shift register is not affected by the LE (latch enable), BL (blanking), or the POL (polarity) inputs. Transfer of data from the shift registers to the latches occurs when the LE (latch enable) input is high. The data in the latches is stored when LE is low.