HSP4890

Features: • Single Chip 3 x 3 Kernel Convolution• Programmable On-Chip Row Buffers• DC to 32MHz Clock Rate• Cascadable for Larger Kernels and Images• On-Chip 8-Bit ALU• Dual Coefficient Mask Registers, Switchable in a Single Clock Cycle• 8-Bit Signed or Un...

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HSP4890 Picture
SeekIC No. : 004366447 Detail

HSP4890: Features: • Single Chip 3 x 3 Kernel Convolution• Programmable On-Chip Row Buffers• DC to 32MHz Clock Rate• Cascadable for Larger Kernels and Images• On-Chip 8-Bit ALU&...

floor Price/Ceiling Price

Part Number:
HSP4890
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/2/15

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Product Details

Description



Features:

• Single Chip 3 x 3 Kernel Convolution
• Programmable On-Chip Row Buffers
• DC to 32MHz Clock Rate
• Cascadable for Larger Kernels and Images
• On-Chip 8-Bit ALU
• Dual Coefficient Mask Registers, Switchable in a Single Clock Cycle
• 8-Bit Signed or Unsigned Input and Coefficient Data
• 20-Bit Extended Precision Output
• Standard mP Interface
• Low Power CMOS



Application

• Image Filtering
• Edge Detection
• Adaptive Filtering
• Real Time Video Filter



Pinout

  Connection Diagram


Specifications

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  +8.0V
Input, Output or I/O Voltage Applied . . . . .GND -0.5V to VCC +0.5V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. Class1



Description

The Intersil HSP48908 is a high speed Two Dimensional Convolver which provides a single chip implementation of a video data rate 3 x 3 kernel convolution on two dimensional data. It eliminates the need for external data storage through the use of the on-chip row buffers which are programmable for row lengths up to 1024 pixels.

There are Internal Register banks for storing two independent 3 x 3 filter kernels, thus facilitating the implementation of adaptive filters and multiple filter operations on the same data. The pixel data path also includes an on-chip ALU for performing real-time arithmetic  and logical pixel point operations.

Data is provided to the HSP48908 in a raster scan noninterlaced fashion, and is internally buffered on images up to 1024 pixels wide for the 3 x 3 convolution operation. Images with larger rows and convolution with larger kernel sizes can be accommodated by using external row buffers and/or multiple HSP48908s. Coefficient and pixel input data are 8-bit signed or unsigned integers, and the 20-bit convolver output guarantees no overflow for kernel sizes up to 4 x 4. Larger kernel sizes can be implemented however, since the filter coefficients will normally be less than their maximum 8-bit values.

The HSP48908 is manufactured using an advanced CMOS process, and is a low power fully static design. The configuration of the device is controlled through a standard microprocessor interface and all inputs/outputs are TTL compatible.




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