HSP43124

Features: • 45MHz Clock Rate• 256 Tap Programmable FIR Filter• 24-Bit Data, 32-Bit Coefficients• Cascade of up to 5 Half Band Filters• Decimation from 1 to 256• Two Pin Interface for Down Conversion by FS/4• Multiplier for Mixing or Scaling Input with an E...

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HSP43124 Picture
SeekIC No. : 004366403 Detail

HSP43124: Features: • 45MHz Clock Rate• 256 Tap Programmable FIR Filter• 24-Bit Data, 32-Bit Coefficients• Cascade of up to 5 Half Band Filters• Decimation from 1 to 256• T...

floor Price/Ceiling Price

Part Number:
HSP43124
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/17

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Product Details

Description



Features:

• 45MHz Clock Rate
• 256 Tap Programmable FIR Filter
• 24-Bit Data, 32-Bit Coefficients
• Cascade of up to 5 Half Band Filters
• Decimation from 1 to 256
• Two Pin Interface for Down Conversion by FS/4
• Multiplier for Mixing or Scaling Input with an External Source
• Serial I/O Compatible with Most DSP Microprocessors





Application

• Low Cost FIR Filter
• Filter Co-Processor
• Digital Tuner





Pinout

  Connection Diagram




Specifications

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7.0V
Input, Output Voltage . . . . . . . . . . . . . . . . .GND -0.5V to VCC +0.5V
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1





Description

The Serial I/O Filter is a high performance filter engine that is ideal for off loading the burden of filter processing from a DSP microprocessor. HSP43124 supports a variety of multistage filter configurations based on a user programmable filter and fixed coefficient halfband filters. These configurations include a programmable FIR filter of up to 256 taps, a cascade of from one to five halfband filters, or a cascade of halfband filters followed by a programmable FIR. The half band filters each decimate by a factor of two, and the FIR filter decimates from one to eight. When all six filters are selected, a maximum decimation of 256 is provided.

For digital tuning applications, a separate multiplier is provided by HSP43124 which allows the incoming data stream to be multiplied, or mixed, by a user supplied mix factor. A two pin interface is provided for serially loading the mix factor from an external source or selecting the mix factor from an onboard ROM. The on-board ROM contains samples of a sinusoid capable of spectrally shifting the input data by one quarter of the sample rate, FS/4. This allows the chip to function as a digital down converter when the filter stages are configured as a low-pass filter.

The HSP43124 serial interface for3- input and output data is compatible with the serial ports of common DSP microprocessors. Coefficients and configuration data are loaded over a bidirectional eight bit interface.






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