HSD8M64B4W

Features: • Part IdentificationHSD8M64B4W-10 : 100MHz (CL=2)HSD8M64B4W-10L : 100MHz (CL=3)HSD8M64B4W-12 : 125MHz (CL=3)HSD8M64B4W-13 : 133MHz (CL=3)• Burst mode operation• Auto & self refresh capability (4096 Cycles/64ms)• LVTTL compatible inputs and outputs• Sing...

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SeekIC No. : 004366051 Detail

HSD8M64B4W: Features: • Part IdentificationHSD8M64B4W-10 : 100MHz (CL=2)HSD8M64B4W-10L : 100MHz (CL=3)HSD8M64B4W-12 : 125MHz (CL=3)HSD8M64B4W-13 : 133MHz (CL=3)• Burst mode operation• Auto &am...

floor Price/Ceiling Price

Part Number:
HSD8M64B4W
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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268 Transactions

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evaluate  (4.8 stars)

Upload time: 2024/11/23

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Product Details

Description



Features:

• Part Identification
HSD8M64B4W-10 : 100MHz (CL=2)
HSD8M64B4W-10L : 100MHz (CL=3)
HSD8M64B4W-12 : 125MHz (CL=3)
HSD8M64B4W-13 : 133MHz (CL=3)
• Burst mode operation
• Auto & self refresh capability (4096 Cycles/64ms)
• LVTTL compatible inputs and outputs
• Single 3.3V ±0.3V power supply
• MRS cycle with address key programs
- Latency (Access from column address)
- Burst length (1, 2, 4, 8 & Full page)
- Data scramble (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system clock
• The used device is 2M x 16bit x 4Banks SDRAM





Specifications

PARAMETER
SYMBOL
RATING
Voltage on any pin relative to VSS
VIN, VOUT
-1V to 4.6V
Voltage on VCC supply relative to VSS
Vcc
-1V to 4.6V
Power Dissipation
PD
4W
Storage Temperature
TSTG
-55 to 150
Short Circuit Current
IOS
400mA





Description

The HSD8M64B4W is a 8M x 64 bit Synchronous Dynamic RAM high density memory module. The module consists of
four CMOS 2M x 16 bit x 4banks Synchronous DRAMs in TSOP-II 400mil packages on a 144-pin glass-epoxy ubstrate. Two 0.1uF decoupling capacitors are mounted on the printed circuit board in parallel for each SDRAM. The HSD8M64B4W is a SO-DIMM(Small Outline Dual in line Memory Module) and is intended for mounting into 144-pin edge connector sockets. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable latencies allows the same device to be useful for a variety of high bandwidth, high performance memory system applications All module components may be powered from a single 3.3V DC power supply and all inputs and outputs are LVTTL-compatible.






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