Features: • Part IdentificationHSD32M64D8H-10 :100MHz ( CL=2)HSD32M64D8H -10L :100MHz ( CL=3)HSD32M64D8H -80 :125MHz ( CL=3)HSD32M64D8H -75 :133Mhz (CL=3)• Burst mode operation• Auto & self refresh capability (8K Cycles/64ms)• LVTTL compatible inputs and outputs• ...
HSD32M64D8H: Features: • Part IdentificationHSD32M64D8H-10 :100MHz ( CL=2)HSD32M64D8H -10L :100MHz ( CL=3)HSD32M64D8H -80 :125MHz ( CL=3)HSD32M64D8H -75 :133Mhz (CL=3)• Burst mode operation• Au...
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Features: • Part IdentificationHSD32M32M4V-13/F13 :133MHz ( CL=3)HSD32M32M4V-12/F12: 125MHz ...
Features: • Part IdentificationHSD32M64B8A-F/10L : 100MHz (CL=3)HSD32M64B8A-F/10 : 100MHz (C...
PARAMETER | SYMBOL | RATING |
Voltage on Any Pin Relative to Vss | VIN ,OUT | -1V to 4.6V |
Voltage on Vcc Supply Relative to Vss | Vcc | -1V to 4.6V |
Power Dissipation | PD | 8W |
Storage Temperature | TSTG | -55oC to 150oC |
Short Circuit Output Current | IOS | 50mA |
Notes:
Permanent device damage may occur if " Absolute Maximum Ratings" are exceeded. Functional operation should be
restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
The HSD32M64D8H is a 32M x 64 bit Synchronous Dynamic RAM high density memory module. The module consists of eight CMOS 8M x 8 bit with 4banks Synchronous DRAMs in TSOP-II 400mil packages on a 168-pin glass-epoxy substrate. Two 0.1uF decoupling capacitors are mounted on the printed circuit board in parallel for each SDRAM. The HSD32M64D8H is a DIMM(Dual in line Memory Module) and is intended for mounting into 168-pin edge connector sockets. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable latencies allows the same device to be useful for a variety of high bandwidth, high performance memory system applications All module components may be powered from asingle 3.3V DC power supply and all inputs and outputs are LVTTL-compatible.