HS-6564RH

Features: • Radiation Hardened EPI CMOS - Total Dose 1 x 105 RAD (Si) - Transient Upset > 1 x 108 RAD (Si)/s - Latch-Up Free to > 1 x 1012 RAD (Si)/s• Low Power Standby 4.4mW Maximum• Low Power Operation 308mW/MHz Maximum• Data Retention 3.0V Minimum• TTL Compat...

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HS-6564RH Picture
SeekIC No. : 004365822 Detail

HS-6564RH: Features: • Radiation Hardened EPI CMOS - Total Dose 1 x 105 RAD (Si) - Transient Upset > 1 x 108 RAD (Si)/s - Latch-Up Free to > 1 x 1012 RAD (Si)/s• Low Power Standby 4.4mW Maxim...

floor Price/Ceiling Price

Part Number:
HS-6564RH
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/20

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Product Details

Description



Features:

• Radiation Hardened EPI CMOS
    - Total Dose 1 x 105 RAD (Si)
    - Transient Upset > 1 x 108 RAD (Si)/s
    - Latch-Up Free to > 1 x 1012 RAD (Si)/s
• Low Power Standby 4.4mW Maximum
• Low Power Operation 308mW/MHz Maximum
• Data Retention 3.0V Minimum
• TTL Compatible In/Out
• Three State Outputs
• Fast Access Time 250ns Maximum
• Military Temperature Range -55 to +125
• On Chip Address Registers
• Organizable 8K x 8 or 16K x 4
• 40 Pin DIP Pinout 2.000" x 0.900"



Pinout

  Connection Diagram


Specifications

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . .   -3.0V to +7.0V
Input or Output Voltage Applied . . . . . . . . . GND-0.3V to VDD+0.3V
Storage Temperature Range . . . . . . . . . . . . . . . .  -65 to +150
Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . .. . +175
Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . .  +300
Typical Derating Factor . . . . . . . . . .  48mA/MHz Increase in IDDOP
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . Class 1



Description

The HS-6564RH is a radiation hardened 64K bit, synchronous CMOS RAM module. It consists of 16 HS-6504RH 4K x 1 radiation hardened CMOS RAMs, in leadless carriers, mounted on a ceramic substrate. The individual RAMs are fabricated using the Intersil radiation hardened guard ring, self-aligned silicon gate technology. The HS-6564RH is configured as an extra wide, standard length 40 pin DIP. The memory appears to the system as an array of 16 4K x 1 static RAMs. The array is organized as two 8K by 4 blocks of RAM sharing only the address bus. The data inputs, data outputs, chip enables and write enables are seperate for each block of RAM. This allows the user to organize the HS-6564RH RAM as either an 8K by 8 or a 16K by 4 array.

This 64K memory provides a unique blend of low power CMOS semiconductor technology and advanced packaging techniques. The HS-6564RH is intended for use in radiation environments where a large amount of RAM is needed, and where power consumption and board space are prime concerns. On-chip latches are provided for addresses, data input and data output allowing efficient interfacing with microprocessor systems. The data output can be forced to a high impedance for use in expanded memory arrays. The guaranteed low voltage data retention characteristics allow easy implementation of non-volatile readswrite memory by using very small batteries mounted directly on the memory circuit board.




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