HMS25632J2V

Features:

· Access times : 10, 12 ,15, and 70, 85, 100ns
· Low Power Dissipation
· High-density 1Mbyte design
· High-reliability, high-speed design
· Single + 3.3V ±0.3V power supply
· Easy memory expansion /CE and /OE functions
· All inputs and outputs are LVTTL-compatible
· Industry-standard pinout
· FR4-PCB design
· Low profile 68-pin JLCC




Pinout






Specifications

PARAMETER		SYMBOL	RATING
Voltage on Any Pin Relative to Vss		VIN,OUT	-0.5V to +4.6V
Voltage on Vcc Supply Relative to Vss		VCC	-0.5V to +4.6V
Power Dissipation		PD	2W
Storage Temperature		TSTG	-65 to +150
Operating Temperature	Commercial	TA	0 to +70
	Industrial	TA	-40 to +85

Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operating section of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.




Description

The HMS25632J2V is a high-speed static random access memory (SRAM) module containing 262,144 words organized in a x32-bit configuration. The module consists of two 256K x 16 SRAMs mounted on a 68-pin, double-sided, FR4-printed circuit board. The HMS25632J2V uses 31 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. Also it allows that lower and upper byte access by data byte control (/BS0~/BS3). Output enable (/OE) and write enable (/WE) can set the memory input and output. Data is written into the SRAM memory when write enable (/WE) and chip enable (/CE) inputs are both LOW. Reading is accomplished when /WE remains HIGH and /CE and output enable (/OE) are LOW. For reliability, this SRAM module HMS25632J2V is designed as multiple power and ground pin. All module components may be powered from a single +3.3V DC power supply and all inputs and outputs are fully LVTTL-compatible.