Features: ·Access time : 70, 85 and 100ns·High-density design : 32Mbyte Design·Battery internally isolated until power is applied·Unlimited write cycles·Data retention in the absence of VCC·10-years minimum data retention in absence of power·Automatic write-protection during power-up/power-down cy...
HMNP32MM: Features: ·Access time : 70, 85 and 100ns·High-density design : 32Mbyte Design·Battery internally isolated until power is applied·Unlimited write cycles·Data retention in the absence of VCC·10-years...
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PARAMETER |
SYMBOL |
RATING |
UNIT |
REMARK |
Voltage on any pin relative to Vss |
Vin,VCC |
-0.5 to 7.0 |
V |
|
Voltage on Vcc supply relative to Vss |
Vcc |
-0.5 to 7.0 |
V |
|
Power Dissipation |
Pd |
32 |
W |
|
Storage temperature |
TSTG |
-65 to 150 |
||
Operating Temperature |
Ta |
0 to 70 |
K6T4016C3C-B | |
-40 to 85 |
K6T4016C3C-F |
NOTE: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the Recommended DC Operating Conditions detailed in this data sheet. Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
The HMNP32MM Nonvolatile SRAM is a 33,554,432-byte static RAM organized as 16,777,216 words by 16 bits.
The HMNP32MM has a self-contained lithium energy source provide reliable non-volatility coupled with the unlimited write cycles of standard SRAM and integral control circuitry which constantly monitors the single 5V supply for an out-of-tolerance condition. When such a condition occurs, the lithium energy source is automatically switched on to sustain the memory until after VCC returns valid and write protection is unconditionally enabled to prevent garbled data.
In addition the SRAM HMNP32MM is unconditionally write-protected to prevent an inadvertent write operation. At this time the integral energy source is switched on to sustain the memory until after VCC returns valid.
The HMNP32MM uses extremely low standby current CMOS SRAM's, coupled with small lithium coin cells to provide non-volatility without long write-cycle times and the write-cycle limitations associated with EEPROM.