HMMC-2007

Features: • Outputs Terminated in 50 W When Off• Frequency Range: DC-8 GHz• Insertion Loss: 1.2 dB @ 8ÊGHz• Isolation: >70 dB @ 45 MHz >35 dB @ 8 GHz• Return Loss: 25 dB (Both Input and Selected Output) 18 dB Unselected Output• Switching Speed: <2...

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SeekIC No. : 004364713 Detail

HMMC-2007: Features: • Outputs Terminated in 50 W When Off• Frequency Range: DC-8 GHz• Insertion Loss: 1.2 dB @ 8ÊGHz• Isolation: >70 dB @ 45 MHz >35 dB @ 8 GHz• Retur...

floor Price/Ceiling Price

Part Number:
HMMC-2007
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• Outputs Terminated in 50 W When Off
• Frequency Range: DC-8 GHz
• Insertion Loss: 1.2 dB @ 8ÊGHz
• Isolation: >70 dB @ 45 MHz
                  >35 dB @ 8 GHz
• Return Loss: 25 dB (Both Input and Selected Output) 18 dB Unselected Output
• Switching Speed: <20 ms (10%-90% RF)
• P-1dB: 27 dBm
• Harmonics (DC Coupled): <-80 dBc @ 10 dBm



Application

The HMMC-2007 can be used in instrumentation, communications, radar, ECM, EW, and many other systems requiring SPDT switching. It can be used for pulse modulation, port isolation, transfer switching, high-speed switching, replacement of mechanical switches, and so on.




Specifications

Symbol
Parameters/Conditions
Units
Min.
Max.
Vsel
Select Voltages 1 and 2
V
-10.5
+10.5
Pin
RF Input Power
dBm
27
Top
Operating Temperature
-55
+125
TSTG
Storage Temperature
-65
+165
Tmsx
Maximum Assembly Temp.
(for 60 seconds max.)
+200
Punsel
Power into Unselected Output
dBm
27



Description

The HMMC-2007 is a GaAs monolithic microwave integrated circuit (MMIC) designed for low insertion loss and high isolation from DC to 8 GHz. It is intended for use as a general-purpose, single-pole, double-throw (SPDT), absorptive switch. Two series and two shunt MESFETs per throw provide 1.4 dB maximum insertion loss and 38 dB typical isolation at 6 GHz. HMMC-2007 chips use through-substrate vias to provide ground connections to the chip backside and minimize the number of wire bonds required.




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