Features: · Part Identification HMD4M72D18EG --- 4KCycles/64ms Ref, Gold Plate Lead· High-density 32MByte design· New JEDEC standard proposal without buffer· CAS-before-RAS Refresh capability· RAS-only and Hidden refresh capability· Single +5± 0.5V power supply w Timing· EDO mode operation. 50ns a...
HMD4M72D18EG: Features: · Part Identification HMD4M72D18EG --- 4KCycles/64ms Ref, Gold Plate Lead· High-density 32MByte design· New JEDEC standard proposal without buffer· CAS-before-RAS Refresh capability· RAS-o...
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Features: Access times : 50, 60 ns w Timing High -density 64MByte design 50ns access -5Part ident...
Features: · Part Identification HMD4M32M2E----4K Cycles/64ms Ref. Solder HMD4M32M2EG- 4K Cycles/64...
PARAMETER | SYMBOL | RATING |
Voltage on Any Pin Relative to Vss | VIN ,OUT | -0.5V to 4.6V |
Voltage on Vcc Supply Relative to Vss | Vcc | -0.5V to 4.6V |
Power Dissipation | PD | 18W |
Storage Temperature | TSTG | -55 to 150 |
Short Circuit Output Current | IOS | 50mA |
w Permanent device damage may occur if " Absolute Maximum Ratings" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
The HMD4M72D18EG is a 4Mx72bits Dynamic RAM high density memory module. It consists of eighteen CMOS 4Mx4bits DRAMs in SOJ/TSOPІІ 400mil packages mounted on a 168-pin glass-epoxy substrate. A 0.1 or
0.22uF decoupling capacitor is mounted on the printed circuit board for each DRAM. It is a Dual Inline Memory Module and is intended for mounting into 168 pin edge connector sockets