Features: • 2.5 V ± 5% operation and 1.5 V (VDDQ)• 32-Mbit density• Synchronous register to register operation• Internal self-timed late write• Byte write control (4 byte write selects, one for each 9-bit)• Optional ×18 configuration• HSTL compatible I/O...
HM64YGB36100: Features: • 2.5 V ± 5% operation and 1.5 V (VDDQ)• 32-Mbit density• Synchronous register to register operation• Internal self-timed late write• Byte write control (4 by...
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Features: • 2.5 V ± 5% operation and 1.5 V (VDDQ)• 16M bit density• Byte write c...
Features: • 2.5 V ± 5% operation and 1.5 V (VDDQ)• 16M bit density• Internal sel...
Parameter |
Symbol |
Rating |
Unit |
Notes |
Input voltage on any pin |
VIN |
−0.5 to VDDQ + 0.5 |
V |
1, 4 |
Core supply voltage |
VDD |
−0.5 to +3.13 |
V |
1 |
Output supply voltage |
VDDQ |
−0.5 to +2.1 |
V |
1, 4 |
Operating temperature |
TOPR |
0 to +85 |
||
Storage temperature |
TSTG |
−55 to +125 |
||
Output short-circuit current |
IOUT |
25 |
mA |
|
Latch up current |
ILI |
200 |
mA |
|
Package junction to top thermal resistance |
J-top |
6.5 |
/W |
5 |
Package junction to board thermal resistance |
J-board |
12 |
/W |
5 |
Notes: 1. All voltage is referenced to VSS.
2. Permanent device damage may occur if absolute maximum ratings are exceeded. Functional operation should be restricted the operation conditions. Exposure to higher voltages than recommended voltages for extended periods of time could affect device reliability.
3. These CMOS memory circuits have been designed to meet the DC and AC specifications shown in the tables after thermal equilibrium has been established.
4. The following supply voltage application sequence is recommended: VSS, VDD, VDDQ, VREF then VIN. Remember, according to the absolute maximum ratings table, VDDQ is not to exceed 2.1 V, whatever the instantaneous value of VDDQ.
5. See figure below.
The HM64YGB36100 is a synchronous fast static RAM organized as 1-Mword × 36-bit. HM64YGB36100 has realized high speed access time by employing the most advanced CMOS process and high speed circuit designing technology. It is most appropriate for the application which requires high speed, high density memory and wide bit width configuration, such as cache and buffer memory in system. It is packaged in standard 119-bump BGA.
Note of HM64YGB36100: All power supply and ground pins must be connected for proper operation of the device.