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HM62G18512

Features: ` Power supply: 3.3 V +10%, 5%` Clock frequency: 200 MHz to 250 MHz` Internal self-timed late write` Byte write control (2 byte write selects, one for each 9-bit)` Optional ´36 configuration` HSTL compatible I/O` Programmable impedance output drivers` User selective input trip-poin...

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SeekIC No. : 004363532 Detail

HM62G18512: Features: ` Power supply: 3.3 V +10%, 5%` Clock frequency: 200 MHz to 250 MHz` Internal self-timed late write` Byte write control (2 byte write selects, one for each 9-bit)` Optional ´36 confi...

HM62G18512 Data Sheet

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Part Number:
HM62G18512
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

`  Power supply: 3.3 V +10%, 5%
`  Clock frequency: 200 MHz to 250 MHz
`  Internal self-timed late write
`  Byte write control (2 byte write selects, one for each 9-bit)
`  Optional ´36 configuration
`  HSTL compatible I/O
`  Programmable impedance output drivers
`  User selective input trip-point
`  Differential, HSTL clock inputs
`  Asynchronous G output control
`  Asynchronous sleep mode
`  Limited set of boundary scan JTAG IEEE 1149.1 compatible
`  Protocol: Single clock register-register mode


Specifications

Symbol
PARAMETER
Value
Notes
Unit
VIN
Input voltage on any pin
0.5 to VDDQ + 0.5
1, 4
V
VDD
Core supply voltage
0.5 to 3.9
1
V
VDDQ
Output supply voltage
0.5 to 2.2
1, 4
V
TOPR
Operating temperature
0 to 70
°C
TSTG
Storage temperature
55 to 125
°C
Tj
Junction temperature
110
  
°C
IOUT
Output shortcircuit current
25
mA
ILI
Latch up current
200
  
mA
qJC
Package junction to case thermal resistance
2
5, 7
°C/W
qJB
Package junction to ball thermal resistance
5
6, 7
°C/W



Description

The HM62G18512 is a synchronous fast static RAM organized as 512-kword ´ 18-bit. HM62G18512 has realized high speed access time by employing the most advanced CMOS process and high speed circuit designing technology. It is most appropriate for the application which requires high speed, high density memory and wide bit width configuration, such as cache and buffer memory in system. It is packaged in standard 119- bump BGA.




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