HIP7020

The circuit of Figure 1 illustrates the essential elements of the J1850 Bus Transceiver in a normal application. For normal J1850 applications, a Bus Transceiver is used at each system node. The Electrical Specifications Table also refers to the peripheral components shown in Figure 1 and the Block Diagram for the HIP7020 Bus Transceiver.

The HIP7020 IC is an Integrated I/O Bus Transceiver designed for the SAE Standard J1850 Class B Data Communication Network Interface. The Bus transmits and receives data on a single wire using a 10.4kHz VPWM (Variable Pulse Width Modulated) signal. The HIP7020 serves as an I/O buffer interfacing to 5V CMOS logic. It is designed to operate directly from the 12V battery line of an automobile. The normal Bus voltage swing capability is from 0V to 7.75V at currents greater than 20mA.

As shown in the Block Diagram, the Transmitter TX Input and the Receiver RX Output of the Bus Transceiver Circuit interface to the control logic. The TX input signal is wave shaped for rise time, fall time and amplitude before it is converted from voltage to current. The Wave Shaper with an external programming resistor, RS controls the rise and fall time of the BUS OUT output signal. The current source drive to the Bus is voltage controlled by the Wave Shaped Voltage Reference to a maximum limit as specified for the J1850 Bus and includes short-circuit current limiting.

The HIP7020 Receiver input, BUS IN is connected to the J1850 Bus through an external resistor, RF and has a trip point at one-half of the nominal Bus signal voltage of HIP7020 which is 3.875V. The Receiver input is filtered to remove high frequency Bus noise by the external resistor and an internal capacitor. The Receiver Bus signal, after processing, is output at the RX pin by the RX Buffer's open collector driver. The RX output is active low and requires an external pull-up resistor returned to the control logic VCC supply. This prevents power-up of the control logic by the transceiver if VCC supply voltage is removed.

The HIP7020 has a Loop-Back Enable Mode Switch to return diagnostic information for the Bus Transceiver node. For an active low or an open LB EN input, the Transmit/ Receive signals are internally "Looped-Back" to provide a TX to RX return signal path independent of signals on the Bus. A return path validation indicates proper action of the Bus Transceiver apart from the J1850 Bus.