HI3306

Features:

• CMOS Low Power (Typ). . . . . . . . . . . . . . . . . . . . .55mW
• Parallel Conversion Technique
• Single Power Supply Voltage . . . . . . . . . . . . 3V to 7.5V
• Sampling Rate with Single 5V Supply . . . . . . . . 15MHz
• 6-Bit Latched Three-State Output with Overflow Bit
• Linearity (INL, DNL):
         - HI3306JIP/15 . . . . . . . . . . . . . . . . . . . . . . . . . ±0.5 LSB
         - HI3306JIP/10 . . . . . . . . . . . . . . . . . . . . . . . . . ±0.5 LSB
         - HI3306JIB/15 . . . . . . . . . . . . . . . . . . . . . . . . . ±0.5 LSB
         - HI3306JIB/10 . . . . . . . . . . . . . . . . . . . . . . . . . ±0.5 LSB
• Sampling Rate:
         - HI3306JIP/15 . . . . . . . . . . . . . . . . . . . . . 15MHz (67ns)
         - HI3306JIP/10 . . . . . . . . . . . . . . . . . . . . 10MHz (100ns)
         - HI3306JIB/15 . . . . . . . . . . . . . . . . . . . . . 15MHz (67ns)
         - HI3306JIB/10 . . . . . . . . . . . . . . . . . . . . 10MHz (100ns)


Application

• Video Digitizing
• Digital Communication Systems
• High Speed Data Acquisition
• Radar Signal Processing


Pinout




Specifications

DC Supply Voltage Range, V_DD
Voltage Referenced to VSS Terminal . . . . . . . . . . . -0.5V to +8.5V
Input Voltage Range
All Inputs Except Zener. . . . . . . . . . . . . . . . . -0.5V to VDD + 0.5V
DC Input Current
CLK, PH, CE1, CE2, VIN . . . . . . . . . . . . . . . . . . . . . .  . . . . ±20mA


Description

The HI3306 family are CMOS parallel (FLASH) analog-todigital converters designed for applications demanding both low power consumption and high speed digitization. Digitizing at 15MHz, for example, requires only about 55mW.

The HI3306 family operates over a wide, full scale signal input voltage range of 1V up to the supply voltage. Power consumption is as low as 15mW, depending upon the clock frequency selected. The HI3306 offers improved linearity at a lower reference voltage and high operating speed with a 5V supply.

The overflow bit makes possible the connection of two or more HI3306s in series to increase the resolution of the conversion system.
Sixty-four paralleled auto balanced comparators measure the input voltage with respect to a known reference to produce the parallel bit outputs in the HI3306. Sixty-three comparators are required to quantize all input voltage levels in this 6-bit converter, and the additional comparator is required for the overflow bit.