HI-1565

Supply voltage(VDD) ........................-0.3 V to +7 V
Logic input voltage range .........-0.3 V dc to +5.5 V
Power dissipation at ............................25 1.0 W
ceramic DIL, derate ...................................7mW/
Solder Temperature .....................275°C for 10 sec.
Junction Temperature .....................................175
Storage Temperature........................ -65 to +150
Receiver differential voltage........................ 10 Vp-p
Driver peak output current ............................+1.0 A

The HI-1565 and HI-1566 are low power CMOS dual transceivers designed to meet the requirements of the MIL-STD-1553 /1760 specifications.

The transmitter section of each channel takes complementary CMOS / TTL digital input data and converts HI-1565 to bi-phase Manchester encoded 1553 signals suitable for driving the bus isolation transformer. Separate transmitter inhibit control signals are provided for each transmitter.

The receiver section of each channel converts the 1553 bus bi-phase data to complementary CMOS / TTL data suitable for inputting to a Manchester decoder. Each receiver has a separate enable input which can be used to force the output of the receiver to a logic 0 (HI-1565) or logic 1 (HI-1566).

To minimize the package size for this function of HI-1565 , the transmitter outputs are internally connected to the receiver inputs, so that only two pins are required for connection to each coupling transformer.