Features: • IEEE 802.3z Gigabit Ethernet Compatible
• ANSI x3.230-1994 Fibre Channel Compatible (FC-O)
• Supports Serial Data Rates of 1062.5 MBd (Fibre Channel) & 1250 MBd (Gigabit Ethernet)
• Low Power Consumption, 630 mW Typical
• Transmitter and Receiver Functions Incorporated onto a Single IC
• Three Package Sizes Available:
10 mm TQFP (HDMP-T1636A)
10 mm PQFP (HDMP-1636A)
14 mm PQFP (HDMP-1646A)
• 10-Bit Wide Parallel TTL Compatible I/Os
• Single +3.3 V Power Supply
• 5-Volt Tolerant I/Os
• 2 kV ESD Protection on All PinsApplication• 1250 MBd Gigabit Ethernet Interface
• 1062.5 MBd Fibre Channel Interface
• Mass Storage System I/O Channel
• Work Station/Server I/O Channel
• Backplane Serialization
• FC Interface for Disk Drives and ArraysPinout
Specifications
| Symbol |
Parameter |
Units |
Min. |
Max. |
| VCC |
Supply Voltage |
V |
-0.5 |
5.0 |
| VIN,TTL |
TTL Input Voltage |
V |
-0.7 |
VCC +2.8 |
| VIN,HS_IN |
HS_IN Input Voltage |
V |
|
VCC |
| IO,TTL |
TTL Output Source Current |
mA |
|
13 |
| Tstg |
Storage Temperature |
°C |
65 |
+150 |
| Tj |
Junction Operating Temperature |
°C |
0 |
+150 |
DescriptionThe HDMP-1636A transceiver is a single integrated circuit packaged in a plastic QFP package. HDMP-1636A provides a low-cost,low-power physical layer solution for 1250 MBd Gigabit Ethernet,1062.5 MBd Fibre Channel, and proprietary link interfaces.HDMP-1636A provides complete Serialize/Deserialize (SerDes) for copper transmission, incorporating the Gigabit Ethernet/Fibre Channel transmit and receive functions into a single device.
Features of the HDMP-1636A are:(1)IEEE 802.3z gigabit ethernet compatible; (2)ANSI x3.230-1994 fibre channel compatible (FC-O); (3)supports serial data rates of 1062.5 MBd (fibre channel)& 1250 MBd (Gigabit Ethernet); (4)low power consumption,630 mW typical; (5)transmitter and receiver functions incorporated onto a single IC; (6)10-bit wide parallel TTL compatible I/Os; (7)single +3.3 V power supply; (8)5-volt tolerant I/Os; (9)2 kV ESD protection on all pins.The transmitter section's PLL locks to the user supplied reference byte clock. This clock is then multiplied by 10 to generate the high speed serial clock used to generate the high speed output. The high speed outputs are capable of interfacing directly to copper cables for electrical transmission or to a separate fiber optic module for optical transmission.
The absolute maximum ratings of the HDMP-1636A can be summarized as:(1)supply voltage:-0.5 to 0.5V;(2)storage temperature:-65 to +150;(3)junction operating temperature:0 to +150 ;(4)TTL input voltage:-0.7 to Vcc+2.8V;(5)TTL output source current:13 mW.The recovered parallel data is presented to the user at TTL compatible outputs.The receiver section also recovers two receiver byte clocks which are 180 degrees out of phase with each other. For Gigabit Ethernet,these clocks are 62.5 MHz,whereas for Fibre Channel, they are 53.125 MHz.The parallel data is properly aligned with the rising edge of alternating clocks.For test purposes, the transceiver provides for on-chip local loop-back functionality, controlled through an external input pin.Additionally, the byte synchronization feature may be disabled. This may be useful in proprietary applications which use alternative methods to align the parallel data.
HDMP-1636A Data Sheet
