HDMP-0422

      The HDMP-0422 is a Single Port Bypass Circuit (PBC) with Clock and Data Recovery(CDR)capability included. This integrated circuit provides a low-cost, low-power physical-layer solution for Fibre Channel Arbitrated Loop(FC-AL) disk array configurations. By using a PBC such as the HDMP-0422, hard disks may be pulled out or swapped while other disks in the array are available to the system. A PBC consists of multiple 2:1multiplexers daisy chained along with a CDR. Each port has two modes of operation: "disk in loop" and "disk bypassed." When the"disk in loop" mode is selected, the loop goes into and out of the disk drive at that port. For example, data goes from the HDMP-0422's TO_NODE[n]± differential output pins to the Disk Drive Transceiver IC's (e.g. an HDMP-1636A) Rx differential input pins. Data from the Disk Drive Transceiver IC's Tx differential outputs goes to the HDMP-0422's FM_NODE[n]±differential input pins. Figures 2 and 3 show connection diagrams for disk  drive array applications.
      When the "disk bypassed" mode is selected, the disk drive is either absent or non-functional and the loop bypasses the hard disk. The "disk bypassed" mode is enabled by pulling the BYPASS[n]-pin low. Leave BYPASS[n]-floating to enable the "disk in loop" mode. HDMP-0422s may be cascaded with other members of the HDMP-04XX/HDMP-05XX family through the appropriate FM_NODE[n]± andTO_NODE[n]± pins to accommodate any number of hard disks (see Figure 4). The unused cells in the  HDMP-0422 may be bypassed by using pulldown resistors on the BYPASS[n]- pins for these cells.
      An HDMP-0422 may also be used as two 1:1 buffers, one with a CDR and one without. For example, an HDMP-0422 may be placed in front of a CMOS ASIC to clean the jitter of the outgoing signal (CDR path) and to better read the incoming signal (non-CDR paths). In addition, the HDMP-0422 may be configured as one 2:1 multiplexers or as one 1:2 buffers.
      The features of HDMP-0422 are Supports 1.0625 GBd Fibre Channel operation, Supports 1.25 GBd Gigabit Ethernet (GE) operation, Single PBC/CDR in one package, CDR location determined by choice of cable input/output, Amplitude valid and data valid detection (Fibre channel rate only) on FM_NODE[0] input, Equalizers on all inputs, High-speed LVPECL I/O, Buffered Line Logic (BLL) outputs(no external bias resistors required), 0.46 W typical power at VCC = 3.3 V, 24 Pin, low-cost SSOP package.
      The HDMP-0422 can be used as RAID, JBOD, BTS cabinets, One 2:1 muxes, One 1:2 buffers, 1 N Gigabit serial buffer, N 1 Gigabit serial mux.The HDMP-0422 design allows for CDR placement at any location with respect to a hard disk slot. For example, if hard disk A is connected to PBC cell 1, while BYPASS[0]- is left to float high (see Figure 2), the CDR function will be performed before entering the hard disk at slot A. To obtain a CDR function after slot A (see Figure 3), connect hard disk A to PBC cell 0, while floating BYPASS[1]- high. Refer to Table 1 for both pin connections.