HDMP-0450

Features: • Supports 1.0625 GBd Fibre Channel operation• Supports 1.25 GBd Gigabit Ethernet (GE) operation• Quad PBC in one package• Signal detect on FM_NODE[0] input• Equalizers on all inputs• High speed LVPECL I/O• Buffered Line Logic (BLL) outputs (no e...

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HDMP-0450 Picture
SeekIC No. : 004361031 Detail

HDMP-0450: Features: • Supports 1.0625 GBd Fibre Channel operation• Supports 1.25 GBd Gigabit Ethernet (GE) operation• Quad PBC in one package• Signal detect on FM_NODE[0] input• ...

floor Price/Ceiling Price

Part Number:
HDMP-0450
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/6

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Product Details

Description



Features:

• Supports 1.0625 GBd Fibre Channel operation
• Supports 1.25 GBd Gigabit Ethernet
  (GE) operation
• Quad PBC in one package
• Signal detect on FM_NODE[0] input
• Equalizers on all inputs
• High speed LVPECL I/O
• Buffered Line Logic (BLL) outputs
  (no external bias resistors required)
• 0.5 W typical power at VCC = 3.3 V
• 44 Pin, 10 mm, low-cost plastic QFP package



Application

• RAID, JBOD, BTS cabinets
• Two 2:1 muxes
• Two 1:2 buffers
• 1 => N gigabit serial buffer
• N => 1 gigabit serial mux



Pinout

  Connection Diagram


Specifications

Symbol Parameter Units Min. Max.
vcc Supply Voltage V -0.5 4.0
VIN,LVTTL LVTTL Input Voltage V -0.5 VCC + 0.5[1]
VIN,HS_IN HS_IN Input Voltage (Differential) mV 200 2000
IO,LVTTL LVTTL Output Sink/Source Current mA   +13
Tstg Storage Temperature °C -65 +150
Tj Junction Temperature °C 0 +125
Note: 1. Must remain less than or equal to absolute maximum VCC voltage of 4.0 V.



Description

The HDMP-0450 is a Quad Port Bypass Circuit (PBC) which provides a low-cost, low-power physical-layer solution for Fibre Channel Arbitrated Loop (FC-AL) disk array configurations. By using a PBC such as the HDMP-0450, hard disks may be pulled out or swapped while other disks in the array are available to the system.

A PBC consists of multiple 2:1 multiplexers daisy chained together. Each port has two modes of operation: "disk in loop" and "disk bypassed." When the "disk in loop" mode is selected, the loop goes into and out of the disk drive at that port. For example, data goes from the HDMP-0450's TO_NODE[n]± differential output pins to the Disk Drive Transceiver IC's (e.g., an HDMP-1636A) Rx differential input pins. Data from the Disk Drive Transceiver IC's Tx differential outputs goes to the HDMP-0450's FM_NODE[n]± differential inputpins.

Figure 2 shows connection diagrams for disk drive array applications. When the "disk bypassed" mode is selected, the disk drive is either absent or nonfunctional and the loop bypasses the hard disk. The "disk bypassed" mode is enabled by pulling the BYPASS[n]- pin low. Leave BYPASS[n]- floating to enable the "disk in loop" mode. HDMP-0450s may be cascaded with other members of the HDMP-04XX/HDMP-05XX family through the appropriate FM_NODE[n]± and TO_NODE[n]± pins to accommodate any number of hard disks (see Figure 3). The unused cells in the HDMP-0450 may be bypassed by using pulldown resistors on the BYPASS[n]- pins for these cells.

An HDMP-0450 may also be configured as five 1:1 buffers, as two 2:1 multiplexers, or as two 1:2 buffers.




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