Features: • 3.3 V supply, low power dissipation 660 mW Tx, 792 mW Rx• On-chip encode/decode using Conditional Inversion Master Transition (CIMT) protocol• 1:N broadcast ready configurable receiver inputs allow multi-point data broadcast using a single transmitter• Parallel ...
HDMP-1032A: Features: • 3.3 V supply, low power dissipation 660 mW Tx, 792 mW Rx• On-chip encode/decode using Conditional Inversion Master Transition (CIMT) protocol• 1:N broadcast ready confi...
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The HDMP-1032A transmitter and HDMP-1034A receiver are used together to build a high-speed data link for point-to-point communication. These HDMP-1032A silicon bipolar transmitter and receiver chips are housed in standard plastic 64 pin PQFP packages. From the user's viewpoint, these products can be thought of as a "virtual ribbon cable" interface for the transmission of data and control words. A parallel word loaded into the Tx (transmitter) chip is delivered to the Rx (receiver) chip over a serial channel and is then reconstructed into its original parallel form.
The HDMP-1032A channel can be either a coaxial copper cable or optical link The chip set hides from the user the complexity of encoding, multiplexing, clock extraction, demultiplexing and decoding. The CIMT encoding scheme used ensures the DC balance of the serial line. When data or control words are not being sent the transmitter sends idle words. The serial data rate of the Tx/Rx link is selectable in three ranges and extends from 208 to 1120 Mbit/s. This translates into an encoded serial rate of 260 to 1400 MBaud. The parallel data interface is 16 bit TTL. A flag bit is also present and can be used as an extra 17th bit under the user's control.
This HDMP-1032A bit can be used as an even or odd word indicator for dual-word transmission. The encoding of the flag bit can be scrambled to reduce the probability of erroneous word alignment. A user control space is also provided. If TXCNTL is asserted on the Tx chip, the least significant 14 bits of the data will be sent and the RXCNTL line on the Rx chip will indicate the data is a Control Word. At the Rx, the PASS feature allows the recovered words to be clocked out with the local REFCLK.
This feature of HDMP-1032A is particularly useful when the Tx clock and REFCLK are synchronous. The PASS system also supports synchronization of multiple channels. The chipset is compatible with previous versions of the G-Link chipset (HDMP-10x2/10x4) provided the latter are used in 16 bit Simplex with Periodic Sync Pulse or External Reference Oscillator Mode (Simplex Method II or III).