Features: ` High Speed Operation: tpd (Data to Q, Q) = 11 ns typ (CL = 50 pF)` High Output Current: Fanout of 15 LSTTL Loads` Wide Operating Voltage: VCC = 2 to 6 V` Low Input Current: 1 A max` Low Quiescent Supply Current: ICC (static) = 4 A max (Ta = 25°C)PinoutSpecifications Item Symbol...
HD74HC573: Features: ` High Speed Operation: tpd (Data to Q, Q) = 11 ns typ (CL = 50 pF)` High Output Current: Fanout of 15 LSTTL Loads` Wide Operating Voltage: VCC = 2 to 6 V` Low Input Current: 1 A max` Low ...
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Features: · Outputs Source/Sink 24 mAPinoutSpecifications Item Symbol Max Unit Condition ...
Item |
Symbol |
Rating |
Unit |
Supply voltage range |
VCC |
0.5 to +7.0 |
V |
Input voltage |
VIN |
0.5 to VCC + 0.5 |
V |
Output voltage |
VOUT |
0.5 to VCC + 0.5 |
V |
Output current |
IOUT |
±35 |
mA |
DC current drain per VCC , GND |
ICC, IGND |
±75 |
mA |
DC input diode current |
IIK |
±20 |
mA |
DC output diode current |
IOK |
±20 |
mA |
Power Dissipation per package |
PT |
500 |
mW |
Storage temperature |
Tstg |
65 to +150 |
°C |
When the HD74HC573 latch enable (LE) input is high, the Q outputs of HD74HC563 will follow the inversion of the D inputs and the Q outputs of HD74HC573 will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.