HD49338NP

• Suppresses low-frequency noise output from CCD by the S/H type correlated double sampling.
• The S/H response frequency characteristics for the reference level can be adjusted using values of external parts and registers.
• High sensitivity is achieved due to the high S/N ratio and a wide coverage provided by a PG amplifier.
• Feedback is used to compensate and reduce the DC offsets including the output DC offset due to PGA gain change and the CCD offset in the CDS (correlated double sampling) amplifier input.
• PGA, standby mode, etc., is achieved via a serial interface.
• High precision is provided by a 12-bit-resolution A/D converter.

Notes:
1. V_DD indicates AV_DD and DV_DD.
2. AV_DD and DV_DD must be commonly connected outside the IC. When they are separated by a noise filter, the potential difference must be 0.3 V or less at power on, and 0.1 V or less during operation.

The HD49338NP/HNP is a CMOS IC that provides CDS-PGA analog processing (CDS/PGA) suitable for CCD camera digital signal processing systems together with a 12-bit A/D converter in a single chip.