Features: Receiver (RX)` Low Noise Amplifier (LNA) bias circuit` 1st mixer` IF amplifier` 2nd mixer` Automatic gain control amplifier (AGC)` IQ demodulator with 90° phase splitterTransmitter (TX)` IQ modulator with 90° phase splitter` Offset PLL` Down converter` Phase comparator` TX VCO driver` IF...
HD155101BF: Features: Receiver (RX)` Low Noise Amplifier (LNA) bias circuit` 1st mixer` IF amplifier` 2nd mixer` Automatic gain control amplifier (AGC)` IQ demodulator with 90° phase splitterTransmitter (TX)` I...
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Item | Symbol | Ratings | Unit |
Power supply voltage (VCC) | VCC | 0.3 to +4.0 | V |
Power supply voltage (VCCCOMP) | VCCCOMP | VCC to +5.5 | V |
Pin voltage | VT | 0.3 to VCC + 0.3 (6.0 Max) | V |
Maximum power dissipation | PT | 400 | mW |
Operating temperature | Topr | 20 to +85 | °C |
Storage temperature | Tstg | 55 to +125 | °C |
The HD155101BF was developed for GSM and EGSM cellular systems, and integrates most of the functions of a transceiver. The HD155101BF incorporates the bias circuit for a RF LNA, a 1st mixer, 1st-IF amplifier, 2nd mixer, AGC amplifier and an IQ quadrature demodulator for the receiver, and an IQ quadrature modulator and offset PLL for the transmitter. Also, on chip are the dividers for the 1st & 2nd local oscillator signals and 90° phase splitter. Moreover the HD155101BF includes control circuits to implement power saving modes. These functions can operate down to 2.7 V and are housed in a 48-pin LQFP SMD package.
Hence the HD155101BF can form a small size transceiver handset for GSM and EGSM by adding a PLL frequency synthesizer IC, a power amplifier and some external components. See page 7 "Configuration".
The HD155101BF is fabricated using a 0.6 mm double-polysilicon Bi-CMOS process.