Features: • Designed for DDR200/266/333/400 PC mother board clock buffering• Supports 60 MHz to 210 MHz operation range• Distributes one to six differential clock outputs pairs• Spread spectrum clock compatible• External feedback pin (FBIN) is used to synchronize the ...
HD151BF854: Features: • Designed for DDR200/266/333/400 PC mother board clock buffering• Supports 60 MHz to 210 MHz operation range• Distributes one to six differential clock outputs pairsR...
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Item | Symbol | Ratings | Unit | Conditions |
Supply voltage | VDD | 0.5 to 3.6 | V | |
Input voltage | VIC | 0.5 to 3.6 | V | CLKIN |
VI | 0.5 to VDD+0.5 | V | ||
Output voltage *1 | VO | 0.5 to VDD+0.5 | V | |
Input clamp current | IIK | 50 | mA | VI < 0 |
Output clamp current | IOK | 50 | mA | VO < 0 |
Continuous output current | IO | ±50 | mA | VO = 0 to VDD |
Maximum power dissipation at Ta = 55 (in still air) |
0.7 | W | ||
Storage temperature | Tstg | 65 to +150 |
Notes: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
1. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
The HD151BF854 is a high-performance, low-skew, low-jitter, PLL clock buffer. It is specifically designed for use with DDR (Double Data Rate) PC motherboard application.