Features: · Synchronous or asynchronous operation· 3-state outputs· Master-reset input to clear control functions· 33 MHz (typ.) shift-in, shift-out rates with or without flags· Very low power consumption· Cascadable to 25 MHz (typ.)· Readily expandable in word and bit dimensions· Pinning arranged...
HCT7030: Features: · Synchronous or asynchronous operation· 3-state outputs· Master-reset input to clear control functions· 33 MHz (typ.) shift-in, shift-out rates with or without flags· Very low power consu...
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The 74HC/HCT7030 are high-speed Si-gate CMOS devices specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT7030 is an expandable, First-In First-Out (FIFO) memory organized as 64 words by 9 bits. A 33 MHz
data-rate makes it ideal for high-speed applications. Even at high frequencies, the ICC dynamic is very low (fmax = 18 MHz; VCC = 5 V produces a dynamic ICC of 80 mA). If the device is not continuously operating at fmax, then ICC will decrease proportionally.
With separate controls for shift-in (SI) and shift-out (SO), reading and writing operations are completely independent, allowing synchronous and asynchronous data transfers. Additional controls include a master-reset input (MR) and an output enable input (OE). Flags for data-in-ready (DIR) and data-out-ready (DOR) indicate the status of the device. 74HC/HCT7030 can be interconnected easily to expand word and bit dimensions. All output pins are directly opposite the corresponding input pins thus simplifying board layout in expanded applications.