PinoutSpecifications Symbol Parameter Value Unit VDD * Supply Voltage: HCC TypesHCF Types -0.5 to +20-0.5 to +18 VV Vi Input Voltage -0.5 to VDD + 0.5 V II DC Input Current (any one input) ± 10 mA Ptot Total Power Dissipation (per package)Dissipation per Output T...
HCF4532BC1_1086127: PinoutSpecifications Symbol Parameter Value Unit VDD * Supply Voltage: HCC TypesHCF Types -0.5 to +20-0.5 to +18 VV Vi Input Voltage -0.5 to VDD + 0.5 V II DC Input Curre...
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Symbol | Parameter | Value | Unit |
VDD * | Supply Voltage: HCC Types HCF Types |
-0.5 to +20 -0.5 to +18 |
V |
Vi | Input Voltage | -0.5 to VDD + 0.5 | V |
II | DC Input Current (any one input) | ± 10 | mA |
Ptot | Total Power Dissipation (per package) Dissipation per Output Transistor for Top = Full Package Temperature Range |
200 100 |
mW mW |
Top | Operating Temperature: HCC Types HCF Types |
-55 to +125 -40 to +85 |
|
Tstg | Storage Temperature | -65 to +150 |
Stresses above those l isted under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the perational sec-tions of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may ffect device reliabil ity.
The HCC4532B (extended temperature range) and HCF4532B (intermediate temperature range) are monolithic integrated circuit, available in 16-lead dual in-line plastic or ceramic package and plastic micro package.
The HCC/HCF4532 consists of combinational logic that encodes the highest priority input (D7-D0) to a 3-bit binary code. The eight inputs, D7 through D0, each have an assigned priority. D7 is the highest priority and D0 is the lowest. The priority encoder is inhibited when the chip-enable input El is low.When El is high, the binary representation of the highest-priority input appears on output linesQ2-Q0, and the group select line GS is high to indicate that priority inputs are present. The enable-out (EO)ishighwhen no priority inputs are present. If anyone input is high,EO is low and all cascaded lower-order stages are disabled.