HCF4520B

Features: ` MEDIUM SPEED OPERATION : 6MHz (Typ.) at 10V` POSITIVE -OR NEGATIVE- EDGE TRIGGERING`SYNCHRONOUS INTERNAL CARRY PROPAGATION` QUIESCENT CURRENT SPECIF. UP TO 20V` 5V, 10V AND 15V PARAMETRIC RATINGS` INPUT LEAKAGE CURRENT II = 100nA (MAX) AT VDD = 18V TA = 25` 100% TESTED FOR QUIESCENT CU...

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HCF4520B Picture
SeekIC No. : 004359711 Detail

HCF4520B: Features: ` MEDIUM SPEED OPERATION : 6MHz (Typ.) at 10V` POSITIVE -OR NEGATIVE- EDGE TRIGGERING`SYNCHRONOUS INTERNAL CARRY PROPAGATION` QUIESCENT CURRENT SPECIF. UP TO 20V` 5V, 10V AND 15V PARAMETRI...

floor Price/Ceiling Price

Part Number:
HCF4520B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

` MEDIUM SPEED OPERATION : 6MHz (Typ.) at 10V
` POSITIVE -OR NEGATIVE- EDGE TRIGGERING
`SYNCHRONOUS INTERNAL CARRY PROPAGATION
` QUIESCENT CURRENT SPECIF. UP TO 20V
` 5V, 10V AND 15V PARAMETRIC RATINGS
` INPUT LEAKAGE CURRENT
    II = 100nA (MAX) AT VDD = 18V TA = 25
` 100% TESTED FOR QUIESCENT CURRENT
` MEETS ALL REQUIREMENTS OF JEDEC JESD13B "STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES
   CMOS DEVICES"



Pinout

  Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VDD
Supply Voltage
-0.5 to +22
V
VI
DC Input Voltage
-0.5 to VDD + 0.5
V
II
DC Input Current
± 10
mA
PD
Power Dissipation per Package
200
mW
Power Dissipation per Output Transistor
100
mW
Top
Operating Temperature
-55 to +125
Tstg
Storage Temperature
-65 to +150
Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied.

All voltage values are referred to VSS pin voltage.


Description

HCF4520B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages.

HCF4520B, a Dual Binary Up Counter, consists of two identical, internal 4-stage counters. The counter stages are D-type Flip-Flops having interchangeable Clock and Enable lines for incrementing on either the positive-going or negative going transitions. For single-unit operations the Enable input is maintained High and the counter advances on each positive going transition of the Clock. The counters are cleared by high levels on their Reset lines. The counter can be cascaded in the ripple mode by connecting Q4 to the enable input of the subsequent counter while the clock input of the latter is held low.




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