HCF4094B

Features: *3- STATE PARALLEL OUTPUTS FOR CONNECTION TO COMMON BUS*SEPARATE SERIAL OUTPUTS SYNCHRONOUS TO BOTH POSITIVE AND NEGATIVE CLOCK EDGES FOR CASCADING*MEDIUM SPEED OPERATION 5MHz at 10V*QUIESCENT CURRENT SPECIFIED UP TO 20V*STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS*5V, 10V AND 15V PAR...

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SeekIC No. : 004359697 Detail

HCF4094B: Features: *3- STATE PARALLEL OUTPUTS FOR CONNECTION TO COMMON BUS*SEPARATE SERIAL OUTPUTS SYNCHRONOUS TO BOTH POSITIVE AND NEGATIVE CLOCK EDGES FOR CASCADING*MEDIUM SPEED OPERATION 5MHz at 10V*QUIES...

floor Price/Ceiling Price

Part Number:
HCF4094B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

*3- STATE PARALLEL OUTPUTS FOR CONNECTION TO COMMON BUS
*SEPARATE SERIAL OUTPUTS SYNCHRONOUS TO BOTH POSITIVE AND NEGATIVE CLOCK EDGES FOR CASCADING
*MEDIUM SPEED OPERATION 5MHz at 10V
*QUIESCENT CURRENT SPECIFIED UP TO 20V
*STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS
*5V, 10V AND 15V PARAMETRIC RATINGS
*INPUT LEAKAGE CURRENT
   II = 100nA (MAX) AT VDD =18V TA = 25°C
*100% TESTED FOR QUIESCENT CURRENT
*MEETS ALL REQUIREMENTS OF JEDEC JESD13B " STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES"


 




Pinout

  Connection Diagram


Specifications

Symbol Parameter Value Unit
VDD Supply Voltage -0.5 to +22 V
VI DC Input Voltage -0.5 to VDD + 0.5
V
II DC Input Current ± 10 mA
PD Power Dissipation per Package 500 (*) mW
Power Dissipation per Output Transistor 100 mW
Top Operating Temperature -55 to +125 °C
Tstg Storage Temperature -65 to +150 °C



Description

   The HCF4094B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages.
The HCF4094B is an 8 stages serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive clock transition. The data in each shift register stage is transferred to the storage register when the STROBE input is high.Datainthe storageregister appears attheoutputs whenever the OUTPUT-ENABLE signal is high.Two serial outputs are available for cascading number of HCF4094B devices. Data is available at the QS serial output terminal on positive clock edges to allow for high speed operation in cascaded system in which the clock rise time is fast. The same serial information, available at the Q'S terminal on the next negative clock edge,provides a means for cascading HCF4094B devices when the clock rise time is slow.

 


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