HCF4068B

Features: `MEDIUM-SPEED OPERATION tPHL, tPLH = 75ns (typ.) AT 10V `BUFFERED OUTPUT `QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE `5V, 10V, AND 15V PARAMETRIC RATINGS `INPUT CURRENT OF 100nA AT 18V AND 25 FOR HCC DEVICE `100% TESTEDFOR QUIESCENT CURRENT`MEETSALLREQUIREMENTSOFJEDECTENTATIVESTA...

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SeekIC No. : 004359676 Detail

HCF4068B: Features: `MEDIUM-SPEED OPERATION tPHL, tPLH = 75ns (typ.) AT 10V `BUFFERED OUTPUT `QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE `5V, 10V, AND 15V PARAMETRIC RATINGS `INPUT CURRENT OF 100nA AT...

floor Price/Ceiling Price

Part Number:
HCF4068B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/24

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Product Details

Description



Features:

`MEDIUM-SPEED OPERATION tPHL, tPLH = 75ns (typ.) AT 10V
`BUFFERED OUTPUT
`QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE
`5V, 10V, AND 15V PARAMETRIC RATINGS
`INPUT CURRENT OF 100nA AT 18V AND 25 FOR HCC DEVICE
`100% TESTEDFOR QUIESCENT CURRENT
`MEETSALLREQUIREMENTSOFJEDECTENTATIVESTANDARDN°13A, "STANDARD SPECIFICATIONS FOR DESCRIPTION OF "B" SERIESCMOS DEVICES"



Pinout

  Connection Diagram


Specifications

Symbol Parameter Value Unit
VDD* Supply Voltage :HCC Types
HCF Types
0.5 to + 20
0.5 to + 18
V
V
Vi Input Voltage 0.5 to VDD + 0.5 V
II DC Input Current (any one input) ± 10 mA
Ptot Total Power Dissipation (per package)
Dissipation per Output Transistor
for Top = Full Package-temperature Range
200
100
mW
mW
Top Operating Temperature : HCC Types
HCF Types
55 to + 125
40 to + 85

Tstg Storage Temperature 65 to + 150



Description

In the HCC/HCF4068B series, the HCC4068B (extended temperature range) and HCF4068B (intermediate temperature range) are monolithic integrated circuit, available in 14-lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF4068B NAND/AND gate provides the system designer with direct implementation of the positive-logic 8-input NANDand AND functions and supplements the existing family of COS/MOS gates.


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