Specifications Symbol Parameter Value Unit VDD* SupplyVoltage :HCC Types HCF Types 0.5to+20 0.5to+18 V V Vi Input Voltage 0.5 to VDD + 0.5 V II DC Input Current (any one input) ± 10 mA Ptot Total PowerDissipation(perpackage)DissipationperOutputTransistorforT...
HCF4034B: Specifications Symbol Parameter Value Unit VDD* SupplyVoltage :HCC Types HCF Types 0.5to+20 0.5to+18 V V Vi Input Voltage 0.5 to VDD + 0.5 V II DC Input Current (an...
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Symbol | Parameter | Value | Unit |
VDD* |
SupplyVoltage :HCC Types HCF Types |
0.5to+20 0.5to+18 |
V
|
Vi | Input Voltage | 0.5 to VDD + 0.5 | V |
II | DC Input Current (any one input) | ± 10 | mA |
Ptot | Total PowerDissipation(perpackage) DissipationperOutputTransistor forTop=FullPackagetemperatureRange |
200
|
mW
|
Top |
Operating Temperature :HCCType HCFTypes |
55to+125
|
|
Tstg | Storage Temperature | 65to+150 |
In the HCC/HCF4034B series, the HCC4034B (extended temperature range) and HCF4034B (intermediate temperature range) are monolithic integrated circuits, available in 24-lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF4034B is a static eight-stage parallel-or serial-input parallel-output register. It can be used to : 1) bidirectionally transfer parallel information between two buses ; 2) convert serial data to parallel form and direct the parallel data to either of twobuses ; 3) store (recirculate) parallel data, or 4) accept parallel datafrom either of two buses and convert that data to serial form. Inputs that control the operations include a single-phase CLOCK (CL), A DATA ENABLE (AE), ASYNCHRONOUS/ SYNCHRONOUS (A/S), A-BUS-TOB- BUS/B-BUS-TO-A-BUS (A/B), and PARALLEL/ SERIAL (P/S). Data inputs include 16 bidirectional parallel data lines of which the eight Adata lines are inputs (3-state outputs) and the Bdata lines are outputs (inputs) depending on the signal level on the A/B input. In addition, an input for SERIAL DATAis also provided. All HCC/HCF4034B register stages are D-typemasterslave flip-flops withseparate master and slave clockinputs generated internally to allow synchronous or asynchronous data transfer from master to slave. Isolation from external noise and the effects of loading is provided by output buffering.