HCF4023B

Features: · PROPAGATION DELAY TIME :tPD = 60ns (Typ.) at VDD = 10V · BUFFERED INPUTS AND OUTPUTS· STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS· QUIESCENT CURRENT SPECIFIED UP TO 20V· 5V, 10V AND 15V PARAMETRIC RATINGS· INPUT LEAKAGE CURRENT II= 100nA (MAX) AT VDD = 18V TA = 25°C· 100% TESTED FO...

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HCF4023B Picture
SeekIC No. : 004359643 Detail

HCF4023B: Features: · PROPAGATION DELAY TIME :tPD = 60ns (Typ.) at VDD = 10V · BUFFERED INPUTS AND OUTPUTS· STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS· QUIESCENT CURRENT SPECIFIED UP TO 20V· 5V, 10V AND ...

floor Price/Ceiling Price

Part Number:
HCF4023B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

· PROPAGATION DELAY TIME :tPD = 60ns (Typ.) at VDD = 10V
· BUFFERED INPUTS AND OUTPUTS
· STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS
· QUIESCENT CURRENT SPECIFIED UP TO 20V
· 5V, 10V AND 15V PARAMETRIC RATINGS
· INPUT LEAKAGE CURRENT II = 100nA (MAX) AT VDD = 18V TA = 25°C
· 100% TESTED FOR QUIESCENT CURRENT
· MEETS ALL REQUIREMENTS OF JEDEC JESD13B " STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES"



Pinout

  Connection Diagram


Specifications

Symbol Parameter² Value Unit
VDD Supply Voltage -0.5 to +22
V
VI DC Input Voltage -0.5 to VDD + 0.5 V
II DC Input Current ± 10 mA
PD Power Dissipation per Package 200 mW
Power Dissipation per Output Transistor 100 mW
Top Operating Temperature -55 to +125
Tstg Storage Temperature -65 to +150

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.
All voltage values are referred to VSS pin voltage.




Description

The HCF4023B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages.

The HCF4023B TRIPLE 3 INPUT NAND GATE provides the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.




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