HCF40101B

Features:

`STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS
`QUIESCENT CURRENT SPECIFIED AT 20V FOR HCC DEVICE
`5V, 10V, AND 15V PARAMETRIC RATINGS
`INPUT CURRENTOF 100nA AT 18V AND 25°C FOR HCC DEVICE
`100% TESTEDFOR QUIESCENT CURRENT
`MEETSALLREQUIREMENTSOFJEDECTENTATIVESTANDARDN°13A, "STANDARD SPECIFICATIONS FOR DESCRIPTION OF "B" SERIESCMOS DEVICES"


Pinout




Specifications

Symbol	Parameter	Value	Unit
VDD*	Supply Voltage :HCC Types HCF Types	0.5 to + 20 0.5 to + 18	V V
Vi	Input Voltage	0.5 to VDD + 0.5	V
II	DC Input Current (any one input)	± 10	mA
Ptot	Total Power Dissipation (per package) Dissipation per Output Transistor for Top = Full Package-temperature Range	200 100	mW mW
Top	Operating Temperature : HCC Types HCF Types	55 to + 125 40 to + 85
Tstg	Storage Temperature	65 to + 150

Description

In the  HCC/HCF40101B  series, the HCC40101B (extended temperature range) and HCF40101B (intermediate temperature range) are monolithic integrated circuits, available in 14- lead dual in-line plastic or ceramic package and plastic micro package.

The HCC/HCF40101B is a 9-bit (8 data bits plus 1 parity bit) parity generator/checker. It may be used to detect errors in data transmission or data retrieval. Odd and even outputs facilitate odd or even parity generation and checking. When used as a parity generator, a parity bit is supplied along with the data to generate an even or odd parity output.

When used a parity checker, the received data bits and parity bits are compared for correct parity. The even or odd outputs are used to indicate an error in the received data. Word-length capability is expandable by cascading. The HCC/HCF40101B is also provided with an inhibit control. If the inhibit control is set at logical "1", the even and odd outputs go to a logical "0".