HCF4006B

Features:

`PERMANENT REGISTER STORAGE WITH CLOCK LINE "HIGH" OR "LOW" ... NO INFORMATION RECIRCULATION REQUIRED
`FULLY STATIC OPERATION
`SHIFTING RATES UP TO 12MHz@ 10V (typ.)
`STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS
`QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE
`INPUT CURRENTOF100nA AT 18V AND 25 FOR HCC DEVICE
`100% TESTEDFOR QUIESCENT CURRENT
`5V, 10V, AND 15V PARAMETRIC RATING
`MEETSALLREQUIREMENTSOFJEDECTENTATIVESTANDARDN°13A, "STANDARD SPECIFICATIONS FOR DESCRIPTION OF "B" SERIESCMOS DEVICES"


Pinout




Specifications

Symbol	Parameter	Value	Unit
VDD *	Supply Voltage: HCC Types HCF Types	-0.5 to +20 -0.5 to +18	V V
Vi	Input Voltage	-0.5 to VDD + 0.5	V
II	DC Input Current (any one input)	± 10	mA
Ptot	Total Power Dissipation (per package) Dissipation per Output Transistor for Top = Full Package Temperature Range	200 100	mW mW
Top	Operating Temperature: HCC Types HCF Types	-55 to +125 -40 to +85
Tstg	Storage Temperature	-65 to +150

Description

In the HCC/HCF4006B ,the HCC4006B(extended temperature range) and the HCF4006B (standard temperature range), are monolithic integrated circuits, available in 14-lead dual in-line plastic or ceramic package and plastic micro package. The types are comprised of 4 separate "shift register" sections ; two sections of four stages and twosections of five stageswith an output tap at the fourth stage. Each section has an independent "single rail" data path. A commonclock signal is used for all stages. Data is shifted to the next stage on negative-going transitions of the clock.

Through appropriate connections of inputs and outputs, multiple register sections of 4, 5, 8, and 9 stages or single register sections of 10, 12, 13, 14, 16, 17 and 18 can be implemented using one HCC/HCF4006B package. Longer shift register sections can be assembled by using more than one HCC/HCF4006B. To facilitate cascading stages when clock rise and fall times are slow, an optional output (D1 + 4') that is delayed one-half clock-cycle, is provided (see truth table for output from pin 2).