HCC4099BF_1189541

Stresses above listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a tress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability.
* All voltage values are referred to V_SS pin voltage.

The  HCC/HCF4099B  are monolithic integrated circuits, available in16-lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF4099B  8-bit addressable latch is aserial-input, parallel-output storage register that can perform a variety of functions. Data are in- putted to a particular bit in the latch when that bit is addressed (by means of inputs A0, A1, A2) and when WRITE DISABLE is at a low level. When WRITE DISABLE is high, data entry is inhibited ;however, all 8 outputs can be continuously read in-dependent ofWRITE DISABLE and address inputs. A master RESET input is available, which resets all bits to a logic "0" level when RESET and WRITE DISABLE are at a high level.When RESET is at a high level, andWRITEDISABLE is at a lowlevel, the latch acts as a 1-of-8 demultiplexer ; the bit that is addressed has an active output which follows the data input, while all unaddressed bits are held to a logic "0" level.