HCC4035B

Features:

`4-STAGE CLOCKED SHIFT OPERATION
`SYNCHRONOUSPARALLEL ENTRYON ALL 4 STAGES
`JK INPUTSON FIRSTSTAGE
`ASYNCHRONOUSTRUE/COMPLEMENT CONTROL ON ALL OUTPUTS
`STATIC FLIP-FLOP OPERATION ; MASTERSLAVECONFIGURATION
`BUFFERED INPUTS AND OUTPUTS
`HIGH SPEED 12MHz (typ.) AT VDD = 10V
`QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE
`STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS
`5V, 10V, AND 15V PARAMETRIC RATINGS
`INPUT CURR 100nA AT 18V AND 25 FOR HCC DEVICE
`100% TESTEDFOR QUIESCENT CURRENT
`MEETSALLREQUIREMENTSOFJEDECTENTATIVE STANDARD N°
`13A, "STANDARD SPECIFICATIONS FOR DESCRIPTION OF "B" SERIESCMOS DEVICES"


Pinout




Specifications

Symbol	Parameter	Value	Unit
VDD*	Supply Voltage :HCC Types HCF Types	0.5 to + 20 0.5 to + 18	V V
Vi	Input Voltage	0.5 to VDD + 0.5	V
II	DC Input Current (any one input)	± 10	mA
Ptot	Total Power Dissipation (per package) Dissipation per Output Transistor for Top = Full Package-temperature Range	200 100	mW mW
Top	Operating Temperature : HCC Types HCF Types	55 to + 125 40 to + 85
Tstg	Storage Temperature	65 to + 150

Description

The HCC/HCF4035B  (extended temperature range and intermediate temperature range) are monolithic integrated circuit, available in 16-lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF4035B is a fourstage clocked signal serial register with provision for synchronous PARALLEL inputs to each stage and SERIAL inputs to the first stage via JK logic. Register stages 2, 3, and 4 are coupled in a serial D flipflop configuration when the register is in the serial mode (PARALLEL/SERIAL control low). Parallel entry into each register stage is permitted when the PARALLEL/SERIAL control is high. In the parallel or serial mode information is transferred on positive clock transitions. When the TRUE/COMPLEMENT control is high, the true contents of the register are available at the output terminals. When the TRUE/COMPLEMENT control is low, the outputs are the complements of the data in the register. The TRUE/COMPLEMENT control functions asynchronously with respect to the CLOCK signal. JK input logic of HCC/HCF4035B is provided on the first stage SERIAL input to minimize logic requirements particularly in counting and sequence-generation applications.