HCC4027B

Features:

`SET-RESET CAPABILITY
`STATIC FLIP-FLOP OPERATION - RETAINS STATE INDEFINITELY WITH CLOCK LEVEL EITHER "HIGH" OR "LOW"
`MEDIUM SPEED OPERATION - 16MHz (typ.clock toggle rate at 10V)
`STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS
`QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE
`INPUT CURRENTOF 100nA AT 18V AND 25°C FOR HCC DEVICE
`100% TESTEDFOR QUIESCENT CURRENT
`MEETSALLREQUIREMENTSOFJEDECTENTATIVE STANDARD N0. 13A, "STANDARD SPECIFICATIONS FOR ESCRIPTION OF "B" SERIESCMOS DEVICES".


Pinout




Specifications

Symbol	Parameter	Value	Unit
VDD*	Supply Voltage :HCC Types HCF Types	0.5 to + 20 0.5 to + 18	V V
Vi	Input Voltage	0.5 to VDD + 0.5	V
II	DC Input Current (any one input)	± 10	mA
Ptot	Total Power Dissipation (per package) Dissipation per Output Transistor for Top = Full Package-temperature Range	200 100	mW mW
Top	Operating Temperature : HCC Types HCF Types	55 to + 125 40 to + 85
Tstg	Storage Temperature	65 to + 150

Description

The HCC/HCF4027B  (intermediate temperature range) are monolithic integrated circuit, available in 16-lead dual in-line plastic or ceramic package and plastic micro package.

The HCC/HCF4027B is a single monolithic chip integrated circuit containing two identical complementary- symmetry J-K master-slave flip-flops. Each flip-flop has provisions for individual J, K, Set, Reset, and Clock input signals, Buffered Q and Q signals are provided as outputs. This input-output arrangement provides for compatible operation with the HCC/HCF4013B dual D-type flip-flop.

The HCC/HCF4027B is useful in performing control, register, and toggle functions. Logic levels present at the J and Kinputs along with internal self-steering control the state of each flip-flop ; changes in the flipflop state are synchronous with the positive-going transition of the clock pulse. Set and reset functions are independent of the clock and are initiated when a high level signal is present at either the Set or Reset input.