HCC40208B

PinoutSpecifications Symbol Parameter Value Unit VDD* Supply Voltage :HCC Types HCF Types 0.5 to + 20 0.5 to + 18 VV Vi Input Voltage 0.5 to VDD + 0.5 V II DC Input Current (any one input) ± 10 mA Ptot Total Power Dissipation (per package)Dissipation per Ou...

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HCC40208B Picture
SeekIC No. : 004359528 Detail

HCC40208B: PinoutSpecifications Symbol Parameter Value Unit VDD* Supply Voltage :HCC Types HCF Types 0.5 to + 20 0.5 to + 18 VV Vi Input Voltage 0.5 to VDD + 0.5 V II DC Input ...

floor Price/Ceiling Price

Part Number:
HCC40208B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Pinout

  Connection Diagram


Specifications

Symbol Parameter Value Unit
VDD* Supply Voltage :HCC Types
    HCF Types
0.5 to + 20
0.5 to + 18
V
V
Vi Input Voltage 0.5 to VDD + 0.5 V
II DC Input Current (any one input) ± 10 mA
Ptot Total Power Dissipation (per package)
Dissipation per Output Transistor
for Top = Full Package-temperature Range
200
100
mW
mW
Top Operating Temperature : HCC Types
    HCF Types
55 to + 125
40 to + 85
°C
°C
Tstg Storage Temperature 65 to + 150 °C



Description

In the HCC/HCF40208B  series, the HCC40208B (extended temperature range) and HCF40208B (intermediate temperature range) are monolithic integrated circuits, available in 24-lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF40208B is a 4 x 4 multiport register containing four 4-bit registers, write address decoder, two separate read address decoders, and two 3-state output buses. When the ENABLE input is low, the corresponding output bus is switched, independently of the clock to a high-impedance state. The high-impedance third state of HCC/HCF40208B   provides the outputs with the capability of being connected to the bus lines in a bus-organized systemwithout the need for interface or pull-up components. When the WRITE ENABLE input is high, all data input lines are latched on the positive transition of the CLOCKand the data is entered into the wordselected bythewriteaddress lines.WhenWRITE ENABLE is low, the CLOCK is inhibited and no new data isentered. In either case, the contents ofanyword may be accessed via the read address lines independent of the state of the CLOCKinput.




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