Specifications Symbol Parameter Value Unit VDD* Supply Voltage :HCC Types HCF Types 0.5 to + 20 0.5 to + 18 VV Vi Input Voltage 0.5 to VDD + 0.5 V II DC Input Current (any one input) ± 10 mA Ptot Total Power Dissipation (per package)Dissipation per Output T...
HCC4014B: Specifications Symbol Parameter Value Unit VDD* Supply Voltage :HCC Types HCF Types 0.5 to + 20 0.5 to + 18 VV Vi Input Voltage 0.5 to VDD + 0.5 V II DC Input Curren...
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Symbol | Parameter | Value | Unit |
VDD* | Supply Voltage :HCC Types HCF Types |
0.5 to + 20 0.5 to + 18 |
V V |
Vi | Input Voltage | 0.5 to VDD + 0.5 | V |
II | DC Input Current (any one input) | ± 10 | mA |
Ptot | Total Power Dissipation (per package) Dissipation per Output Transistor for Top = Full Package-temperature Range |
200 100 |
mW mW |
Top | Operating Temperature : HCC Types HCF Types |
55 to + 125 40 to + 85 |
°C °C |
Tstg | Storage Temperature | 65 to + 150 | °C |
The HCC/HCF4014B and HCC/HCF4021B (extended temperature range and intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF4014B and HCC/HCF4021B seriestypes are 8-stage parallel-or serial-input/serial-output registers having common CLOCK and PARALLEL/ SERIAL CONTROL inputs, a single SERIAL data input, and individual parallel "JAM" inputs to each register stage. Each register stage is a Dtype, master-slave flip-flop in addition to an output from stage 8, "Q" outputs are also available from stages 6 and 7. Parallel as well as serial entry is made into the register synchronously with the positive clock line transition in the HCC/HCF4014B. In the HCC/HCF4021B serial entry is synchronous with the clock but parallel entry is asynchronous. In both types, entry is controlled by thePARALLEL/SERIAL CONTROL input. When the PARALLEL/SERIAL CONTROL input is low, data is serially shifted into the 8-stage register synchronously with the positive transition of the clock line. When the PARALLEL/SERIAL CONTROL input is high, data is jammed into the 8-stage register via the parallel input