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GS88037BT-333

Features: • Single Cycle Deselect (SCD) operation• 2.5 V or 3.3 V +10%/10% core power supply• 2.5 V or 3.3 V I/O supply•LBO pin for Linear or Interleaved Burst mode• Internal input resistors on mode pins allow floating mode pins• Default to Interleaved Pipeline ...

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SeekIC No. : 004356172 Detail

GS88037BT-333: Features: • Single Cycle Deselect (SCD) operation• 2.5 V or 3.3 V +10%/10% core power supply• 2.5 V or 3.3 V I/O supply•LBO pin for Linear or Interleaved Burst mode• In...

GS88037BT-333 Data Sheet

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Part Number:
GS88037BT-333
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Single Cycle Deselect (SCD) operation
• 2.5 V or 3.3 V +10%/10% core power supply
• 2.5 V or 3.3 V I/O supply
• LBO pin for Linear or Interleaved Burst mode
• Internal input resistors on mode pins allow floating mode pins
• Default to Interleaved Pipeline mode
• Byte Write (BW) and/or Global Write (GW) operation
• Internal self-timed write cycle
• Automatic power-down for portable applications
• JEDEC-standard 100-lead TQFP package
• Pb-Free 100-lead TQFP package available


Application

The GS88037BT is a 9,437,184-bit (8,388,608-bit for x32 version) high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds application in  synchronous SRAM applications, ranging from DSP main store to networking chip set support.




Pinout

Connection Diagram


Specifications

Symbol Description
Value
Unit
VDD Voltage on VDD Pins
0.5 to 4.6
V
VDDQ Voltage in VDDQ Pins
0.5 to 4.6
V
VCK Voltage on Clock Input Pin
0.5 to 6
V
VI/O Voltage on I/O Pins
0.5 to VDDQ +0.5 ( 4.6 V max.)
V
VIN Voltage on Other Input Pins
0.5 to VDD +0.5 ( 4.6 V max.)
V
IIN Input Current on Any Pin
+/20
mA
IOUT Output Current on Any I/O Pin
+/20
mA
PD Package Power Dissipation
1.5
W
TSTG Storage Temperature
55 to 125
TBIAS Temperature Under Bias
55 to 125
Note:
Permanent damage to the device may occur if the Absolute Maximum Ratings are exceeded. Operation should be restricted to Recommended Operating Conditions. Exposure to conditions exceeding the Absolute Maximum Ratings, for an extended period of time, may affect reliability of this component.


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