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GS8182S18D-267

Features: • Simultaneous Read and Write SigmaQuad™ Interface• JEDEC-standard pinout and package• Dual Double Data Rate interface• Byte Write controls sampled at data-in time• DLL circuitry for wide output data valid window and future frequency scaling• Bur...

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SeekIC No. : 004355923 Detail

GS8182S18D-267: Features: • Simultaneous Read and Write SigmaQuad™ Interface• JEDEC-standard pinout and package• Dual Double Data Rate interface• Byte Write controls sampled at data-in...

GS8182S18D-267 Data Sheet

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Part Number:
GS8182S18D-267
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Simultaneous Read and Write SigmaQuad™ Interface
• JEDEC-standard pinout and package
• Dual Double Data Rate interface
• Byte Write controls sampled at data-in time
• DLL circuitry for wide output data valid window and future frequency scaling
• Burst of 2 Read and Write
• 1.8 V +150/100 mV core power supply
• 1.5 V or 1.8 V HSTL Interface
• Pipelined read operation
• Fully coherent read and write pipelines
• ZQ mode pin for programmable output drive strength
• IEEE 1149.1 JTAG-compliant Boundary Scan
• 165-bump, 13 mm x 15 mm, 1 mm bump pitch BGA package
• RoHS-compliant 165-bump BGA package available
• Pin-compatible with future 36Mb, 72Mb, and 144Mb devices


Specifications

Symbol Description Value Unit
VDD Voltage on VDD Pins 0.5 to 2.9 V
VDDQ Voltage in VDDQ Pins 0.5 to VDD V
VI/O Voltage on I/O Pins 0.5 to VDDQ +0.5 ( 2.9 V max.) V
VIN Voltage on Other Input Pins 0.5 to VDDQ +0.5 ( 2.9 V max.) V
IIN Input Current on Any Pin +/100 mA dc
IOUT Output Current on Any I/O Pin +/100 mA dc
TJ Maximum Junction Temperature 125 °C
TSTG Storage Temperature 55 to 125 °C
TSUB Storage Under Bias 50 to 100 °C
VREF Voltage in VREF Pins 0.5 to VDDQ V

Note:
Permanent damage to the device may occur if the Absolute Maximum Ratings are exceeded. Operation should be restricted to Recommended Operating Conditions. Exposure to conditions exceeding the Recommended Operating Conditions, for an extended period of time, may affect reliability of this component.




Description

GS8182S18 are built in compliance with the SigmaSIO-II SRAM pinout standard for Separate I/O synchronous SRAMs. GS8182S18D-267 are 18,874,368-bit (18Mb) SRAMs. These are the first in a family of wide, very low voltage HSTL I/O SRAMs designed to operate at the speeds needed to implement economical high performance networking systems.




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