GAL16V8D-25LPN

Number of Macrocells : 8
Number of Programmable I/Os : 8
Operating Supply Voltage : 5 V
Supply Current : 90 mA
Minimum Operating Temperature : 0 C
Package / Case : PDIP-20
Logic Family : GAL
Delay Time : 25 ns
Maximum Operating Temperature : + 75 C
Maximum Operating Frequency : 41.6 MHz


Description

The GAL16V8D-25LPN belongs to GAL16V8 family, which at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E 2 ) floating gate technology to provide the highest speed performance available in the PLD market. An important subset of the many architecture configurations possible with the GAL16V8 are the PAL architectures listed in the table of the macrocell description section. High speed erase times (<100ms) allow the GAL16V8D-25LPN to be reprogrammed quickly and efficiently. GAL16V8 devices are capable of emulating any of these PAL architectures with full function/fuse map/parametric compatibility. Unique test circuitry and reprogrammable cells allow complete AC, DC, and functional testing during manufacture. The generic architecture provides maximum design flexibility by allowing the Output Logic Macrocell (OLMC) to be configured by the user. As a result, Lattice Semiconductor delivers 100% field programmability and functionality of all GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are specified.

The features of GAL16V8D-25LPN can be summarized as (1)high performance e 2 cmos technology - 3.5 ns maximum propagation delay - Fmax = 250 MHz - 3.0 ns maximum from Clock Input to Data Output - UltraMOS advanced CMOS technology; (2)50% to 75% reduction in power from bipolar - 75mA typ icc on low power device - 45mA typ icc on quarter power device; (3)active pull-ups on all pins; (4)E 2 cell technology - reconfigurable logic - reprogrammable cells - 100% tested/100% yields - high speed electrical erasure (<100ms) - 20 year data retention; (5)eight output logic macrocells - maximum flexibility for complex logic designs - programmable output polarity - also emulates 20-pin PAL devices with full function/fuse map/parametric compatibility; (6)preload and power-on reset of all registers; (7)- 100% functional testability; (8)applications include: - DMA control - state machine control - high speed graphics processing - standard logic speed upgrade; (9)electronic signature for identification; (10)lead-free package options.

The absolute maximum ratings of GAL16V8D-25LPNare (1)supply voltage VCC: 0.5 to +7V; (2)input voltage applied: 2.5 to V CC +1.0V; (3)off-state output voltage applied: 2.5 to V CC +1.0V; (4)storage temperature: 65 to 150°C; (5)ambient temperature with power applied: 55 to 125°C(1.Stresses above those listed under the "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress only ratings and functional operation of the GAL16V8D-25LPN at these or at any other conditions above those indicated in the operational sections of this specification is not implied (while programming, follow the programming specifications).).