FSTD32450

Select pins S₀, S₁, S₂, S₃, S₄ and S₅ are intended to be used as static user configurable control pins. The AC performance of these pins has not been characterized or tested. Switching of these select pins during system operation may temporarily disrupt output logic states and/or enable pin controls.

40-bit configuration can be achieved by connecting the _OE1 and the OE₆ pins to together

Supply Voltage (V_CC) .................................−0.5V to +7.0V
DC Switch Voltage (V_S) (Note 3) ................−2.0V to +7.0V
DC Input Control Pin Voltage
(V_IN) (Note 4) ............................................−0.5V to +7.0V
DC Input Diode Current (l_IK) V_IN < 0V.................. −50 mA
DC Output (I_OUT) Current..................................... 128 mA
DC V_CC/GND Current (I_CC/I_GND) ....................+/− 100 mA
Storage Temperature Range (T_STG)..... −65°C to +150 °C

The Fairchild Universal Bus Switch FSTD32450 provides 4-bit, 5-bit, 8-bit, 10-bit, 16-bit, 20-bit...40-bit of high-speed CMOS TTL-compatible bus switching. The low On Resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise.

The FSTD32450 is designed to allow "customer" configuration control of the enable connections. The device can be organized as either a ten 4-bit, eight 5-bit, four 10-bit, two 20-bit or one 40-bit enabled bus switch. Also achievable are 8-bit and 16-bit enabled configurations (see Functional Description). The FSTD32450's bit configuration is controlled  through select pin logic. (see Truth Table). When OE_x is LOW, Port A_x is connected to Port B_x. When OE_x is HIGH, the switch is OPEN.

Another key FSTD32450 feature is the addition of a level shifting select pin, "S₂ and S₅". When S₂ and S5 are LOW, the device behaves as a standard N-MOS switch. When S₂ and S₅ are HIGH, a diode to V_CC is integrated into the circuit allowing for level shifting between 5V inputs and 3.3V
outputs.